Was wondering if anyone knew why this fault might be triggered?
It triggers when I try to use SPI0 and LTE together.
AT host is disabled.
The code stops here during debugging and then on resume it restarts the application.
fault_s.S line 90
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE) || \
defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
mrs r0, MSP
mrs r1, PSP
mov r2, lr /* EXC_RETURN */
Hi.
SPI0 is using the same hardware as UART0, so you can not use those two at the same time.
Are you using logging in your application?
Are you disabling the serial drivers (CONFIG_SERIAL=n)?
Have you configured the SPM to set up SPI0 as non-secure?
Is there a reason why you are using SPI0 instead of SPI2 which is configured by the SPM by default?
Do you know what the last thing that happens before you enter the fault handler is?
Could you share your <your build folder>/zephyr/.config and <your build folder>/zephyr/zephyr.dts files?
Best regards,
Didrik
Hi.
SPI0 is using the same hardware as UART0, so you can not use those two at the same time.
Are you using logging in your application?
Are you disabling the serial drivers (CONFIG_SERIAL=n)?
Have you configured the SPM to set up SPI0 as non-secure?
Is there a reason why you are using SPI0 instead of SPI2 which is configured by the SPM by default?
Do you know what the last thing that happens before you enter the fault handler is?
Could you share your <your build folder>/zephyr/.config and <your build folder>/zephyr/zephyr.dts files?
Best regards,
Didrik
Logging has been disabled, we are using custom logging which does not go to the UART.
did not disable the serial driver, will try that.
Yes, we are using a custom board package so SPM in configured to do that.
We require a lot of ports and are using SPI as a dedicated one for memory.
I'll share the files soon.
I do have a question in the meantime. Is it necessary to use UART with LTE or can we completely disable the UART without any issues from the drivers?
If you refer to the 'bsdlib' (socket interface) then I have a custom board that has no serial port and the LTE modem is working fine.
But if your question is for the DK or Thingy you might have to modify the software a bit ...
We have a custom board package for our custom board. Issue is we cannot turn off serial as we use UART1 for communicating with the nrf52840. That's why I was wondering if something else is using UART.
/dts-v1/;
/ {
#address-cells = < 0x1 >;
#size-cells = < 0x1 >;
model = "Orbis SMDEVA01 Eval Board";
compatible = "nordic,pca10090-dk", "nordic,nrf9160-sica", "nordic,nrf9160";
chosen {
zephyr,flash = &flash0;
zephyr,sram = &sram0_ns;
zephyr,code-partition = &slot0_ns_partition;
zephyr,bt-uart = &uart1;
};
aliases {
flash-controller = &flash_controller;
rtc-0 = &rtc0;
rtc-1 = &rtc1;
uart-0 = &uart0;
uart-1 = &uart1;
uart-2 = &uart2;
uart-3 = &uart3;
adc-0 = &adc;
egu-0 = &egu0;
egu-1 = &egu1;
egu-2 = &egu2;
egu-3 = &egu3;
egu-4 = &egu4;
egu-5 = &egu5;
gpio-0 = &gpio0;
gpiote-0 = &gpiote;
i2c-0 = &i2c0;
i2c-1 = &i2c1;
i2c-2 = &i2c2;
i2c-3 = &i2c3;
i2s-0 = &i2s0;
pdm-0 = &pdm0;
spi-0 = &spi0;
spi-1 = &spi1;
spi-2 = &spi2;
spi-3 = &spi3;
pwm-0 = &pwm0;
pwm-1 = &pwm1;
pwm-2 = &pwm2;
pwm-3 = &pwm3;
wdt-0 = &wdt;
timer-0 = &timer0;
timer-1 = &timer1;
timer-2 = &timer2;
};
soc {
#address-cells = < 0x1 >;
#size-cells = < 0x1 >;
compatible = "nordic,nRF9160-SICA", "nordic,nRF9160", "nordic,nRF91", "simple-bus";
interrupt-parent = < &nvic >;
ranges;
nvic: interrupt-controller@e000e100 {
compatible = "arm,v8m-nvic";
reg = < 0xe000e100 0xc00 >;
interrupt-controller;
#interrupt-cells = < 0x2 >;
arm,num-irq-priority-bits = < 0x3 >;
phandle = < 0x1 >;
};
systick: timer@e000e010 {
compatible = "arm,armv8m-systick";
reg = < 0xe000e010 0x10 >;
status = "disabled";
};
sram0: memory@20000000 {
compatible = "mmio-sram";
reg = < 0x20000000 0x10000 >;
};
peripheral@40000000 {
#address-cells = < 0x1 >;
#size-cells = < 0x1 >;
ranges = < 0x0 0x40000000 0x10000000 >;
flash_controller: flash-controller@39000 {
compatible = "nordic,nrf91-flash-controller";
reg = < 0x39000 0x1000 >;
#address-cells = < 0x1 >;
#size-cells = < 0x1 >;
label = "NRF_FLASH_DRV_NAME";
flash0: flash@0 {
compatible = "soc-nv-flash";
label = "NRF_FLASH";
erase-block-size = < 0x1000 >;
write-block-size = < 0x4 >;
reg = < 0x0 0x100000 >;
partitions {
compatible = "fixed-partitions";
#address-cells = < 0x1 >;
#size-cells = < 0x1 >;
boot_partition: partition@0 {
label = "mcuboot";
reg = < 0x0 0x10000 >;
};
slot0_partition: partition@10000 {
label = "image-0";
reg = < 0x10000 0x30000 >;
};
slot0_ns_partition: partition@40000 {
label = "image-0-nonsecure";
reg = < 0x40000 0x40000 >;
};
slot1_partition: partition@80000 {
label = "image-1";
reg = < 0x80000 0x30000 >;
};
slot1_ns_partition: partition@b0000 {
label = "image-1-nonsecure";
reg = < 0xb0000 0x40000 >;
};
scratch_partition: partition@f0000 {
label = "image-scratch";
reg = < 0xf0000 0xa000 >;
};
storage_partition: partition@fa000 {
label = "storage";
reg = < 0xfa000 0x6000 >;
};
};
};
};
adc: adc@e000 {
compatible = "nordic,nrf-saadc";
reg = < 0xe000 0x1000 >;
interrupts = < 0xe 0x1 >;
status = "okay";
label = "ADC_0";
#io-channel-cells = < 0x1 >;
};
dppic: dppic@17000 {
compatible = "nordic,nrf-dppic";
reg = < 0x17000 0x1000 >;
status = "okay";
label = "DPPIC";
};
egu0: egu@1b000 {
compatible = "nordic,nrf-egu";
reg = < 0x1b000 0x1000 >;
interrupts = < 0x1b 0x1 >;
status = "okay";
};
egu1: egu@1c000 {
compatible = "nordic,nrf-egu";
reg = < 0x1c000 0x1000 >;
interrupts = < 0x1c 0x1 >;
status = "okay";
};
egu2: egu@1d000 {
compatible = "nordic,nrf-egu";
reg = < 0x1d000 0x1000 >;
interrupts = < 0x1d 0x1 >;
status = "okay";
};
egu3: egu@1e000 {
compatible = "nordic,nrf-egu";
reg = < 0x1e000 0x1000 >;
interrupts = < 0x1e 0x1 >;
status = "okay";
};
egu4: egu@1f000 {
compatible = "nordic,nrf-egu";
reg = < 0x1f000 0x1000 >;
interrupts = < 0x1f 0x1 >;
status = "okay";
};
egu5: egu@20000 {
compatible = "nordic,nrf-egu";
reg = < 0x20000 0x1000 >;
interrupts = < 0x20 0x1 >;
status = "okay";
};
i2s0: i2s@28000 {
compatible = "nordic,nrf-i2s";
#address-cells = < 0x1 >;
#size-cells = < 0x0 >;
reg = < 0x28000 0x1000 >;
interrupts = < 0x28 0x1 >;
status = "disabled";
label = "I2S_0";
};
kmu: kmu@39000 {
compatible = "nordic,nrf-kmu";
reg = < 0x39000 0x1000 >;
interrupts = < 0x39 0x1 >;
status = "okay";
};
pdm0: pdm@26000 {
compatible = "nordic,nrf-pdm";
reg = < 0x26000 0x1000 >;
interrupts = < 0x26 0x1 >;
status = "disabled";
label = "PDM_0";
};
regulators: regulator@4000 {
compatible = "nordic,nrf-regulators";
reg = < 0x4000 0x1000 >;
status = "okay";
};
vmc: vmc@3a000 {
compatible = "nordic,nrf-vmc";
reg = < 0x3a000 0x1000 >;
status = "okay";
};
uart0: uart@8000 {
compatible = "nordic,nrf-uarte";
reg = < 0x8000 0x1000 >;
interrupts = < 0x8 0x1 >;
status = "okay";
label = "UART_0";
tx-pin = < 0xb >;
rx-pin = < 0xc >;
current-speed = < 0x1c200 >;
};
uart1: uart@9000 {
compatible = "nordic,nrf-uarte";
reg = < 0x9000 0x1000 >;
interrupts = < 0x9 0x1 >;
status = "okay";
label = "UART_1";
current-speed = < 0xf4240 >;
tx-pin = < 0x14 >;
rx-pin = < 0x11 >;
rts-pin = < 0x13 >;
cts-pin = < 0x12 >;
};
uart2: uart@a000 {
compatible = "nordic,nrf-uarte";
reg = < 0xa000 0x1000 >;
interrupts = < 0xa 0x1 >;
status = "disabled";
label = "UART_2";
};
uart3: uart@b000 {
compatible = "nordic,nrf-uarte";
reg = < 0xb000 0x1000 >;
interrupts = < 0xb 0x1 >;
status = "disabled";
label = "UART_3";
};
i2c0: i2c@8000 {
#address-cells = < 0x1 >;
#size-cells = < 0x0 >;
reg = < 0x8000 0x1000 >;
clock-frequency = < 0x186a0 >;
interrupts = < 0x8 0x1 >;
status = "disabled";
label = "I2C_0";
};
i2c1: i2c@9000 {
#address-cells = < 0x1 >;
#size-cells = < 0x0 >;
reg = < 0x9000 0x1000 >;
clock-frequency = < 0x186a0 >;
interrupts = < 0x9 0x1 >;
status = "disabled";
label = "I2C_1";
};
i2c2: i2c@a000 {
#address-cells = < 0x1 >;
#size-cells = < 0x0 >;
reg = < 0xa000 0x1000 >;
clock-frequency = < 0x186a0 >;
interrupts = < 0xa 0x1 >;
status = "okay";
label = "I2C_2";
compatible = "nordic,nrf-twim";
sda-pin = < 0x1 >;
scl-pin = < 0x0 >;
};
i2c3: i2c@b000 {
#address-cells = < 0x1 >;
#size-cells = < 0x0 >;
reg = < 0xb000 0x1000 >;
clock-frequency = < 0x186a0 >;
interrupts = < 0xb 0x1 >;
status = "disabled";
label = "I2C_3";
};
spi0: spi@8000 {
#address-cells = < 0x1 >;
#size-cells = < 0x0 >;
reg = < 0x8000 0x1000 >;
interrupts = < 0x8 0x1 >;
status = "okay";
label = "SPI_0";
compatible = "nordic,nrf-spim";
sck-pin = < 0x1a >;
mosi-pin = < 0x1d >;
miso-pin = < 0x1c >;
};
spi1: spi@9000 {
#address-cells = < 0x1 >;
#size-cells = < 0x0 >;
reg = < 0x9000 0x1000 >;
interrupts = < 0x9 0x1 >;
status = "disabled";
label = "SPI_1";
};
spi2: spi@a000 {
#address-cells = < 0x1 >;
#size-cells = < 0x0 >;
reg = < 0xa000 0x1000 >;
interrupts = < 0xa 0x1 >;
status = "disabled";
label = "SPI_2";
};
spi3: spi@b000 {
#address-cells = < 0x1 >;
#size-cells = < 0x0 >;
reg = < 0xb000 0x1000 >;
interrupts = < 0xb 0x1 >;
status = "okay";
label = "SPI_3";
compatible = "nordic,nrf-spim";
sck-pin = < 0x17 >;
mosi-pin = < 0x15 >;
miso-pin = < 0x16 >;
};
pwm0: pwm@21000 {
compatible = "nordic,nrf-pwm";
reg = < 0x21000 0x1000 >;
interrupts = < 0x21 0x1 >;
status = "disabled";
label = "PWM_0";
#pwm-cells = < 0x1 >;
};
pwm1: pwm@22000 {
compatible = "nordic,nrf-pwm";
reg = < 0x22000 0x1000 >;
interrupts = < 0x22 0x1 >;
status = "disabled";
label = "PWM_1";
#pwm-cells = < 0x1 >;
};
pwm2: pwm@23000 {
compatible = "nordic,nrf-pwm";
reg = < 0x23000 0x1000 >;
interrupts = < 0x23 0x1 >;
status = "disabled";
label = "PWM_2";
#pwm-cells = < 0x1 >;
};
pwm3: pwm@24000 {
compatible = "nordic,nrf-pwm";
reg = < 0x24000 0x1000 >;
interrupts = < 0x24 0x1 >;
status = "disabled";
label = "PWM_3";
#pwm-cells = < 0x1 >;
};
gpio0: gpio@842500 {
compatible = "nordic,nrf-gpio";
gpio-controller;
reg = < 0x842500 0x300 >;
#gpio-cells = < 0x2 >;
label = "GPIO_0";
status = "okay";
};
rtc0: rtc@14000 {
compatible = "nordic,nrf-rtc";
reg = < 0x14000 0x1000 >;
interrupts = < 0x14 0x1 >;
status = "okay";
clock-frequency = < 0x8000 >;
prescaler = < 0x1 >;
label = "RTC_0";
};
rtc1: rtc@15000 {
compatible = "nordic,nrf-rtc";
reg = < 0x15000 0x1000 >;
interrupts = < 0x15 0x1 >;
status = "okay";
clock-frequency = < 0x8000 >;
prescaler = < 0x1 >;
label = "RTC_1";
};
clock: clock@5000 {
compatible = "nordic,nrf-clock";
reg = < 0x5000 0x1000 >;
interrupts = < 0x5 0x1 >;
status = "okay";
label = "CLOCK";
};
power: power@5000 {
compatible = "nordic,nrf-power";
reg = < 0x5000 0x1000 >;
interrupts = < 0x5 0x1 >;
status = "okay";
};
wdt: watchdog@18000 {
compatible = "nordic,nrf-watchdog";
reg = < 0x18000 0x1000 >;
interrupts = < 0x18 0x1 >;
status = "okay";
label = "WDT";
};
timer0: timer@f000 {
compatible = "nordic,nrf-timer";
status = "okay";
reg = < 0xf000 0x1000 >;
interrupts = < 0xf 0x1 >;
prescaler = < 0x0 >;
label = "TIMER_0";
};
timer1: timer@10000 {
compatible = "nordic,nrf-timer";
status = "okay";
reg = < 0x10000 0x1000 >;
interrupts = < 0x10 0x1 >;
prescaler = < 0x0 >;
label = "TIMER_1";
};
timer2: timer@11000 {
compatible = "nordic,nrf-timer";
status = "okay";
reg = < 0x11000 0x1000 >;
interrupts = < 0x11 0x1 >;
prescaler = < 0x0 >;
label = "TIMER_2";
};
};
gpiote: gpiote@40031000 {
compatible = "nordic,nrf-gpiote";
reg = < 0x40031000 0x1000 >;
interrupts = < 0x31 0x5 >;
status = "okay";
label = "GPIOTE_1";
};
};
cpus {
#address-cells = < 0x1 >;
#size-cells = < 0x0 >;
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-m33f";
reg = < 0x0 >;
#address-cells = < 0x1 >;
#size-cells = < 0x1 >;
mpu: mpu@e000ed90 {
compatible = "arm,armv8m-mpu";
reg = < 0xe000ed90 0x40 >;
arm,num-mpu-regions = < 0x10 >;
};
};
};
sram0_bsd: memory@20010000 {
compatible = "mmio-sram";
reg = < 0x20010000 0x10000 >;
};
sram0_ns: memory@20020000 {
compatible = "mmio-sram";
reg = < 0x20020000 0x20000 >;
};
};