Custom NRF52840 Board Softdevice Clock Configuration

[David]

Hello, 

I am having problems with a custom NRF52840 Board. My program hands at the ble_stack_init function.

I have encoutered this problem in the past so I have tried the different solutions that worked previously. My board uses both a HF and LF.

    NRF_CLOCK->TASKS_HFCLKSTART = 1;
    while (NRF_CLOCK->EVENTS_HFCLKSTARTED == 0);

    NRF_CLOCK->TASKS_LFCLKSTART = 1;
    while (NRF_CLOCK->EVENTS_HFCLKSTARTED == 0);

I have inserted this functions at the beginning of my main function, and I am able to pass these 2 tests. This should mean that both the HF and LF were successfully initialized.

But my program hangs at ble_stack_init when I set NRF_SDH_CLOCK_LF_SRC to NRF_CLOCK_LF_SRC_XTAL. I have also set the correct accuracy (20 ppm)

It works when I set it to NRF_CLOCK_LF_SRC_SYNTH, But I know this is inefficient. 

What could be the problem with the clock setup?

[Turbo J]

Clean your glasses and look closely at the posted source code:

In the second step you start the LF clock with LFCLKSTART but then use the already set HFCLKSTARTED when trying to wait. You wanted to use the LFCLKSTARTED event instead.

[David]

Hello, I changed this to LFCLKSTARTED and I still get the same result. The code passes the test and LFCLK is started. But still hangs at ble_stack_init

[Vidar Berg]

So the crystal never starts indicating that this a HW problem. Is it the same board that was discussed in your previous ticket? Maybe you can get Kaja to review your clock circuit.

[David]

This is a different board. It seems a bit odd that the crystal will start if it's not explicitly selected. Can you offer a reasoning behind this?

[Vidar Berg]

You have to explicitly select the crystal to use it. Otherwise, you will be starting the internal RC oscillator.

[David]

This is the clock circuit I am using.

https://lcsc.com/product-detail/SMD-Crystal-Resonators_Seiko-Epson_X1A000141000600_Seiko-Epson-X1A000141000600_C94673.html

[Vidar Berg]

C12 and C15 should be closer to 8pF (see 32.768 kHz crystal oscillator (LFXO) chapter for calculation) if the load capacitance of your crystal is CL=6pF.  Wrong loading of the crystal will offset the frequency, but I would still have expected the crystal to ramp up. Have you seen this on more than one board?  

[David]

I have been using this as my reference design and it has been working. The other little thing to note is the LFCLK is physically close to the HFCLK because this is a very small form factor board. Could this be an issue?

[Vidar Berg]

Could it be a problem with soldering or mounting of the crystal then? Also, did you have multiple boards to test this on, or have you only tested this on one board? I think you should be able to start the crystal even if the layout is not optimal.

[David]

I agree. I have tested on multiple boards and they call give the same results. 

I am also not able to use the internal RC as the softdevice clock source. I try to select NRF_SDH_CLOCK_LF_SRC as 0, but My program also hangs. 

Is there any other clock setting I am missing in order to use this?

[Vidar Berg]

You need to specify a calibration interval and also adjust the accuracy when selecting the internal RC oscillator.

Configuration settings for RC source:

//==========================================================

// <h> Clock - SoftDevice clock configuration

//==========================================================
// <o> NRF_SDH_CLOCK_LF_SRC  - SoftDevice clock source.
 
// <0=> NRF_CLOCK_LF_SRC_RC 
// <1=> NRF_CLOCK_LF_SRC_XTAL 
// <2=> NRF_CLOCK_LF_SRC_SYNTH 

#ifndef NRF_SDH_CLOCK_LF_SRC
#define NRF_SDH_CLOCK_LF_SRC 0
#endif

// <o> NRF_SDH_CLOCK_LF_RC_CTIV - SoftDevice calibration timer interval. 
#ifndef NRF_SDH_CLOCK_LF_RC_CTIV
#define NRF_SDH_CLOCK_LF_RC_CTIV 16
#endif

// <o> NRF_SDH_CLOCK_LF_RC_TEMP_CTIV - SoftDevice calibration timer interval under constant temperature. 
// <i> How often (in number of calibration intervals) the RC oscillator shall be calibrated
// <i>  if the temperature has not changed.

#ifndef NRF_SDH_CLOCK_LF_RC_TEMP_CTIV
#define NRF_SDH_CLOCK_LF_RC_TEMP_CTIV 2
#endif

// <o> NRF_SDH_CLOCK_LF_ACCURACY  - External clock accuracy used in the LL to compute timing.
 
// <0=> NRF_CLOCK_LF_ACCURACY_250_PPM 
// <1=> NRF_CLOCK_LF_ACCURACY_500_PPM 
// <2=> NRF_CLOCK_LF_ACCURACY_150_PPM 
// <3=> NRF_CLOCK_LF_ACCURACY_100_PPM 
// <4=> NRF_CLOCK_LF_ACCURACY_75_PPM 
// <5=> NRF_CLOCK_LF_ACCURACY_50_PPM 
// <6=> NRF_CLOCK_LF_ACCURACY_30_PPM 
// <7=> NRF_CLOCK_LF_ACCURACY_20_PPM 
// <8=> NRF_CLOCK_LF_ACCURACY_10_PPM 
// <9=> NRF_CLOCK_LF_ACCURACY_5_PPM 
// <10=> NRF_CLOCK_LF_ACCURACY_2_PPM 
// <11=> NRF_CLOCK_LF_ACCURACY_1_PPM 

#ifndef NRF_SDH_CLOCK_LF_ACCURACY
#define NRF_SDH_CLOCK_LF_ACCURACY 1
#endif