SPI manager for nrf52840 as SPIS

[Embedded_Engineer]

I am interested in transferring large data (>255) over SPIS.

My application requires that the nrf52840 is operated in SPI slave mode. To manage such transaction I have SPI manager (I'll name it SPIMRS ;) ) design on paper for data segmentation / reassembly, queuing and encapsulation/decapsulation custom header. The reverse would happen on the peer layer of SPI master (Xtensa controller).

I have looked into the peripheral\spi_master_using_nrf_spi_mngr example but it's to be used when nRF module is operating in master mode, so I guess I can't use it. Should I proceed with the above mentioned approach (SPIMRS ) or an already invented wheel is out there which I shouldn't try to reinvent?

I assume such intensive management operation would not yield timing faults from soft device communicating with BLE devices as long as I use interrupt at relatively low priority and Easy DMA.

[Embedded_Engineer]

 Jørgen Holmefjord Thank you for your reply. The intention is meta data (such as type of message and length of message) synchronization between both master and slave.

The nRF52840's SPIS is the only communication interface with the other controller acting as SPI Master. The nRF must tell ahead of time (in header) to the master how much clocks should it generate to get the complete message. So the data is variable but within the 16-bit MAXCNT length.

[Jørgen Holmefjord]

Ok, you can do two sequential reads, where the first is always a "header" at a fixed length which tells the master how long the next message will be, and then the actual message. If you have a single slave and a single master on the bus, I'm not sure if you need a manager library for this, but this is of course entirely up to you.

You could also use the ORC byte, to detect the end of a transfer from the master side.