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Questions about I/O capability on nRF52832

Hi

We are using the nRF52832 chip in a design and try to reduce the cost for the product. I have some ideas to simplify the circuits but have some questions about the capabilities for the nRF chip.

1. Measure bi-directional battery current on low side with 20mohm resistor. Today we use an external OP amp configured as a differential amplifier that are biased to be able to measure current in both directions. I think a more simple solution is to connect both sides of the sense resistor directly to two AD pins and use the ADC in differential mode. With gain set to 4, ref voltage 0,6V and 20mohm resistor we have solution that can measure 7.5A in both directions. One drawback is a negative voltage of -150mV when current flows from ground to the system. Maximum absolute specification are -0.3V so there a margin of two. Will it be a reliable solution's or is it better to design so input signals never goes under 0V?

2. Measure some analog signals from voltage dividers that are powered up a short time before supply to the nRF chip i turned on. The divider output is high impedance so is it sufficient to clamp the input signal externally with schottky diodes like BAT54 to supply line? I think there are situations at low temperatures there voltage forward drop for external diodes are some mV higher than 0.3V. So is it necessary  to place the voltage diver after the clamp diode so the clamp voltage is reduced so it never is higher then 0.3V or can the nRF handle signals some mV over 0.3V if this are high impedance?

3. Drive small N-mosfet transistors directly from I/O pins. It is recommended to always use a series resistor to the gate to reduce current for the I/O or can we drive small transistors directly? I nRF datasheet there are rise time specification for I/O pins with 50p load so I suspect a load of 50pF is fine. How large captive load are recommended to drive without a series resistor from the nRF pins?

Best Regrads

Magnus

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  • 1. As long as you are above the -0.3 V minimum voltage on a GPIO, you shouldn't need additional clamping diodes. The ADC will not be able to measure negative voltage though. 

    2. If you can limit the current that flows into the GPIO to a safe level, < 100 µA, you should be fine. The 0.3 V comes from the voltage drop across the ESD protection dioes. If you have resistor in series with the input, the diodes will in any case limit the voltage to VDD+0.3V. You just need to make sure the current is low enough to avoid damage of the diodes. 

    3, Small mosfets can be driven directly by the GPIO without a series resistor. The GPIO voltage will drop below the spec if you draw too much current. So in a situation where you are toggling the mosfet gate very fast, the drive capabilites of the GPIO may not be enough to fully charge and discharge the gate capacitor fast enough. A series resistor will just make it worse and lower the usable frequency.

  • Thanks for the feedback.

    Regarding question 1 above. So the ADC can't read negative voltages in differential mode when V(P) i less than V(N)?

    RESULT = [V(P) – V(N) ] * GAIN/REFERENCE * 2(RESOLUTION - m)

    If the ADC can't read negative differential voltages . Can we swap the two analog signals in PSELP and PSELN registers instead.

  • It can't read voltage below ground, but in differential mode, it will show a negative voltage if the input is below the reference. 

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