How wide of a reset pulse is acceptable for nRF51822

[mcintoda]

What is the tolerable width of the reset pulse (assert low) for the nRF51822 on SWDIO? I can't find anything on the datasheet that explains this.

[John]

Section 8.2 of the nRF51822_PS v3.1.pdf states that the minimum hold time for the pin reset is 0.2 uS in normal mode and 100 uS in debug mode.