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Complications with SPI configuration

Hi,

I am having issues with getting SPI up and running on my nrf52840-DK using NCS.  I've tried getting support about this in another ticket but it seems like it lead to a dead end https://devzone.nordicsemi.com/f/nordic-q-a/60878/configuring-spi0---dt_nordic_nrf_spi_spi_0_irq_0_priority-undeclared.

To summarize my issues:

  1. SPI0 does not seem to work at all, configuring it either causes the build to fail due to "DT_NORDIC_NRF_SPI_SPI_0_IRQ_0_PRIORITY' undeclared" or the device bind fails.
  2. I've managed to get SPI1, SPI2 and SPIM3 to working using a clean empty project but as soon as I try to implement them in my main project I get the following error:

[00:00:00.008,209] <err> os: ***** BUS FAULT *****
[00:00:00.008,209] <err> os:   Instruction bus error
[00:00:00.008,209] <err> os: r0/a1:  0x00000000  r1/a2:  0x20001ce8  r2/a3:  0x20001d00
[00:00:00.008,209] <err> os: r3/a4:  0x00000000 r12/ip:  0x20fe24f0 r14/lr:  0x00000ee1
[00:00:00.008,209] <err> os:  xpsr:  0x60000000
[00:00:00.008,209] <err> os: Faulting instruction address (r15/pc): 0x20fe24f0
[00:00:00.008,239] <err> os: >>> ZEPHYR FATAL ERROR 0: CPU exception on CPU 0
[00:00:00.008,239] <err> os: Current thread: 0x20000328 (unknown)
[00:00:00.942,657] <err> fatal_error: Resetting system

All other peripherals I've used so far, I2C, ADC, GPIO hasn't had any problems at all. Is there any guide at all on how to correctly configure multiple SPIM devices using the configuration manger in SES? I find it confusing why using the old deprecated SPI seems to work but not SPIM. Is there any extra steps required to get this working? I've been troubleshooting this error for weeks now and I am starting to run out of time.

I've attached my proj.conf that has been generated using the configuration tool in SES and my .overlay file.

5556.files.zip

Any help is appreciated, I am starting to lose hope.

Parents Reply Children
  • Probably not helpful, but I see you mentioned I2C/TWI worked. Just for clarification (in case a reader doesn't know) SPI0 and TWI0 are the same underlying hardware which can be configured as SPI or TWI (but not both at the same time) and therefore share registers and interrupt. Any register left set by TWI0 (or be still in use by TWI0) can cause SPI0 to misbehave. SPI1 and TWI1 ditto; there are not 5 SPI & TWI interfaces, only 3 total.

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