IAR I-Jet Debugging Won't Run

[WestCoastDaz]

I can't get a simple application, no soft device, to debug on the nRFDK 10028 board using the I-Jet. I am using the debug in and powering the device from an external power supply at 3.0V.

When I start the debug session I get the following in the debug console window.

Mon Mar 23, 2015 11:18:48: Loading the I-jet/JTAGjet driver 
Mon Mar 23, 2015 11:18:48: Probe: Probe SW module ver 1.40 
Mon Mar 23, 2015 11:18:48: Probe: Option: trace(Auto,size_limit=8M) 
Mon Mar 23, 2015 11:18:48: Probe: I-jet-Trace SW module ver 1.31 
Mon Mar 23, 2015 11:18:48: Probe: Found I-jet, SN=79707 
Mon Mar 23, 2015 11:18:48: Probe: Opened connection to I-jet:79707 
Mon Mar 23, 2015 11:18:48: Probe: USB connection verified (6581 packets/sec) 
Mon Mar 23, 2015 11:18:48: Probe: I-jet, FW ver 4.2, HW Ver:A 
Mon Mar 23, 2015 11:18:48: Probe: None or IJET-MIPI10 adapter detected 
Mon Mar 23, 2015 11:18:48: Probe: Versions: JTAG=1.64 SWO=1.31 A2D=1.58 Stream=1.40 
Mon Mar 23, 2015 11:18:48: EARM v.3.72 
Mon Mar 23, 2015 11:18:48: Emulation layer version 3.72 
Mon Mar 23, 2015 11:18:49: SWD clock detected: 12MHz 
Mon Mar 23, 2015 11:18:49: Connected DAP on SWD. Detected IDCODE=0xbb11477. 
Mon Mar 23, 2015 11:18:49: Connecting Cortex-M core ID = 0x4770021 on DAP port 0 
Mon Mar 23, 2015 11:18:49: Recognized CPUID=0x410cc200 Cortex-M0 r0p0 arch ARMv6-M 
Mon Mar 23, 2015 11:18:49: Debug resources: 4 instruction comparators, 2 data watchpoints. 
Mon Mar 23, 2015 11:18:49: CPU status OK 
Mon Mar 23, 2015 11:18:49: INFO: Configuring trace using 'Auto,size_limit=8M' setting ... 
Mon Mar 23, 2015 11:18:49: CPU does not have TPIU - SWO cannot be enabled 
Mon Mar 23, 2015 11:18:49: LowLevelReset(system, delay 200) 
Mon Mar 23, 2015 11:18:49: CPU status - IN RESET 
Mon Mar 23, 2015 11:18:49: CPU status OK 
Mon Mar 23, 2015 11:18:50: Loaded debugee: C:\dbeckwith\Depot\650_NG\Debug\Exe\c.out 
Mon Mar 23, 2015 11:18:50: The downloaded program doesn't seem to match the expected memory layout of the target system: 
Mon Mar 23, 2015 11:18:50: Some SFRs are placed outside known memory areas, or in memory areas designated as read-only    or    as RAM: 
Mon Mar 23, 2015 11:18:50:   POWER__TASKS_CONSTLAT @ 0x40000078, 32 bits 
Mon Mar 23, 2015 11:18:50:   POWER__TASKS_LOWPWR @ 0x4000007C, 32 bits 
Mon Mar 23, 2015 11:18:50:   POWER__EVENTS_POFWARN @ 0x40000108, 32 bits 
Mon Mar 23, 2015 11:18:50:   POWER__INTENSET @ 0x40000304, 32 bits 
Mon Mar 23, 2015 11:18:50:   POWER__INTENCLR @ 0x40000308, 32 bits 
Mon Mar 23, 2015 11:18:50:   and more... 
Mon Mar 23, 2015 11:18:50: Memory is specified as follows: 
Mon Mar 23, 2015 11:18:50:   0x00000000 - 0x0003FFFF  ROM/Flash 
Mon Mar 23, 2015 11:18:50:   0x10000000 - 0x100003FF  ROM/Flash 
Mon Mar 23, 2015 11:18:50:   0x10001000 - 0x100013FF  ROM/Flash 
Mon Mar 23, 2015 11:18:50:   0x20000000 - 0x20007FFF  RAM 
Mon Mar 23, 2015 11:18:50:   0x40000000 - 0x4001FFFF  RAM 
Mon Mar 23, 2015 11:18:50:   0x50000000 - 0x50000FFF  RAM 
Mon Mar 23, 2015 11:18:50:   0xE0000000 - 0xE00FFFFF  Uncached/SFR 
Mon Mar 23, 2015 11:18:50: SFRs range from 0x10000010 to 0xE00FFFFF 
Mon Mar 23, 2015 11:18:50: Download error at 0x00000000: downloading into non-writable memory. 
Mon Mar 23, 2015 11:18:50: 1192 bytes downloaded (116.41 Kbytes/sec) 
Mon Mar 23, 2015 11:18:50: Warning: Cannot measure current when I-jet is not powering the target. 
Mon Mar 23, 2015 11:18:50: Download completed. 
Mon Mar 23, 2015 11:18:50: LowLevelReset(software, delay 200) 
Mon Mar 23, 2015 11:18:50: Target reset 
Mon Mar 23, 2015 11:18:50: There were 6 warnings during the initialization of the debugging session. 
Mon Mar 23, 2015 11:18:50: CPU status - SLEEPING 
Mon Mar 23, 2015 11:18:50: CPU status OK

[Susheel Nuguru]

Hi Darren,

We have tested the IAR workspace with Segger debugger to make sure that we are inline with debugging standards. We do not use I-Jet for testing here.

[WestCoastDaz]

Aryan,

So no one at Nordic has experience with using I-Jet debuggers or can help me?

[RK]

I have no idea what I-Jet is and you probably should seek some support through whoever supports it. However just looking at the error message gives you some ideas doesn't it?

Clearly there must be some kind of map/definition of the chip being debugged which I-Jet uses to know what's RAM, what's FLASH and where SFRs go (I have no idea what an SFR is, possibly Special Function Register or something like that, unexplained 3-letter acronyms are somewhat useless).

If you look at the map which it prints out right there for you in the error message you can see that the area where the nrf51 peripherals are is denoted as 'RAM', perhaps that's ok, as it writable, perhaps it's not and that should be 'Uncached/SFR'. I'm guessing somewhere is a definition file or table being used which isn't correct, or you have to tell I-Jet what the chip is or where the definition file is or something similar.

[WestCoastDaz]

RK,

Thank you for taking the time to answer. An I-JET is a debugger from IAR Systems. I have looked at the definition file you speak of and did find a mistake in it which I corrected before I posted my question. The mistake was an obvious one where the end of memory range was at a lower address than the start.

The think is the description file works with the J-Link lite debugger that is built into the nRFDK. I have also connected IAR to see if they can support this issue.

Darren

[Susheel Nuguru]

Unfortunately, no one at Nordic uses I-Jet, As I said we make sure that a standard SWD compliant programmer or debugger works with onchip debugger and nordic debugging tools. We expect any other standard SWD compliant programmer or debugger to work the same way.