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nRF24L01+ Reception problem

Hello, I use two nRF24L01+ modules as a transmitter and a receiver, and Atmega8515 as my microprocessors. The transmitter seems to be working as I can see the modulation on a spectrum analyzer, however the receiver does not register anything. I am checking the STATUS register for any data inside RX, but it never gives me the proper value that I've set in the transmitter. Sometimes I receive a trash value but it's not the right one. Please help!

TX Side:

#define F_CPU 8000000UL
#include <avr/io.h>
#include <util/delay.h>
#include <stdio.h>


/*Register address defines for nRF24L01+ */
#define CONFIG 0x00
#define EN_AA 0x01
#define EN_RXADDR 0x02
#define SETUP_AW 0x03
#define RF_CH 0x05
#define RF_SETUP 0x06
#define STATUS 0x07
#define RX_ADDR_P0 0x0A
#define TX_ADDR 0x10
#define RX_PW_P0 0x11
#define WRITE 0xA0
#define NOP 0xFF
#define FLUSH_TX 0xE1

/*PROTOTYPES*/
void SPI_Init(void);
int SPI_ReadWrite(int);
int SPI_WriteComand(int);
void CSNlow(void);
void CSNhigh(void);
void Transmit(void);

int main(void)
{
	int testval;
	int send;
	SPI_Init();
	send='E';
	while(1)
	{

		CSNlow();
		testval=SPI_ReadWrite(FLUSH_TX);	//flush all from TX
		CSNhigh();

		CSNlow();
		testval=SPI_ReadWrite(WRITE);		//write to TX FIFO
		testval=SPI_ReadWrite('E');
		CSNhigh();

		_delay_ms(1);
		Transmit();
		_delay_ms(1);

	}
}

	

int SPI_WriteCommand(int val)
{
	val=val+0x20;				//add the write byte
	SPDR = val;					// Start transmission 
	while(!(SPSR & (1<<SPIF))); 	// Wait for transmission complete 
	_delay_us(10);
	return(SPDR);
}

int SPI_ReadWrite(int val)
{
	SPDR = val;				// Start transmission 
	while(!(SPSR & (1<<SPIF)));	// Wait for transmission complete 
	_delay_us(10);
	return(SPDR);
}

void SPI_Init(void)
{
//	int x;
// Set MOSI,SCK, CSN(DB3) and CE(DB2) output, all others input 
	DDRB =(1<<DDB5)|(1<<DDB7)|(1<<DDB3)|(1<<DDB2);
	DDRA = 0xFF;

	PORTB=PORTB|0x08;		//CSN pin high

// Enable SPI, Master, set clock rate fck/16 
	SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0);
	
	CSNlow();
	SPI_WriteCommand(EN_AA);		//auto-acknowledge
	SPI_WriteCommand(0x00);
	CSNhigh();

	CSNlow();
	SPI_WriteCommand(EN_RXADDR);	//data pipe 1
	SPI_WriteCommand(0x01);
	CSNhigh();

//	CSNlow();
//	SPI_WriteCommand(RF_CH);
//	SPI_WriteCommand(0x10);
//	CSNhigh();

//	CSNlow();
//	SPI_WriteCommand(RX_ADDR_P0);
//	for(x=0;x<=5;x++)
//	{
//		SPI_WriteCommand(0xEB);
//	}
//	CSNhigh();

//	CSNlow();
//	SPI_WriteCommand(TX_ADDR);
//	for(x=0;x<=5;x++)
//	{
//		SPI_WriteCommand(0xEB);
//	}
//	CSNhigh();

	CSNlow();
	SPI_WriteCommand(RX_PW_P0);
	SPI_WriteCommand(0x01);
	CSNhigh();

	CSNlow();
	SPI_WriteCommand(CONFIG);	//Transmit mode
	SPI_WriteCommand(0x76);
	CSNhigh();
	_delay_ms(100);
	
}

void CSNlow(void)
{
	_delay_us(10);
	PORTB=PORTB&0xF7; //CSN low
	_delay_us(10);
}

void CSNhigh(void)
{
	_delay_us(10);
	PORTB=PORTB|0x08; //CSN high
	_delay_us(10);
}
	

void Transmit(void)
{	
	PORTB=PORTB|0x04;		//CE pin high
	_delay_us(150);
	PORTB=PORTB&0xFB;		//CE pin low
}

RX Side:

#define F_CPU 8000000UL
#include <avr/io.h>
#include <util/delay.h>

/*Register address defines for nRF24L01+ */
#define CONFIG 0x00
#define EN_AA 0x01
#define EN_RXADDR 0x02
#define SETUP_AW 0x03
#define RF_CH 0x05
#define RF_SETUP 0x06
#define STATUS 0x07
#define RX_ADDR_P0 0x0A
#define TX_ADDR 0x10
#define RX_PW_P0 0x11
#define WRITE 0xA0
#define READ 0x61
#define NOP 0xFF

/*PROTOTYPES*/
void SPI_Init(void);
int SPI_ReadWrite(int);
int SPI_WriteReg(int);
void DisplayInit(void);
void Command(int);
void Data(int);
void CSNlow(void);
void CSNhigh(void);

int main(void)
{
	int status;
	int data;
	DDRA = 0xFF;	//Port A as output	
	DDRE = 0xFB;	//PE0, PE1 input/PE2 output (TEMP)
	DisplayInit();
	SPI_Init();

	while(1)
	{
		PORTB=PORTB|0x04;		//CE high
		_delay_ms(10);
		PORTB=PORTB&0xFB;		//CE low
		_delay_us(10);
			
		CSNlow();
		status=SPI_ReadWrite(STATUS);		//read status register
		status=SPI_ReadWrite(NOP);		//dummy byte
		CSNhigh();
				

		status=status&0x40;
		if(status==0x40)
		{

			CSNlow();
			data=SPI_ReadWrite(READ);	//read RX FIFO
			data=SPI_ReadWrite(NOP);	 	//dummy byte
			CSNhigh();
			Data(data);				//send received byte to the display
			CSNlow();
//			status=SPI_WriteReg(STATUS);
//			status=SPI_ReadWrite(0x70);		//reset the interrupts
			CSNhigh();
		}
	}
}	

int SPI_WriteReg(int val)
{
	val=val+0x20;				//add the write byte
	SPDR = val;					/* Start transmission */
	while(!(SPSR & (1<<SPIF))); 	/* Wait for transmission complete */
	_delay_us(10);
	return(SPDR);
}

int SPI_ReadWrite(int val)
{
	SPDR = val;				/* Start transmission */
	while(!(SPSR & (1<<SPIF)));	/* Wait for transmission complete */
	_delay_us(10);
	return(SPDR);
}

void SPI_Init(void)
{
//	int x;
/* Set MOSI,SCK, CSN(DB3) and CE(DB2) output, all others input */
	DDRB =(1<<DDB5)|(1<<DDB7)|(1<<DDB3)|(1<<DDB2);

	PORTB=PORTB|0x08;
/* Enable SPI, Master, set clock rate fck/16 */
	SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0);
	
	CSNlow();
	SPI_WriteReg(EN_AA);
	SPI_WriteReg(0x00);
	CSNhigh();

	CSNlow();
	SPI_WriteReg(EN_RXADDR);
	SPI_WriteReg(0x01);
	CSNhigh();

//	CSNlow();
//	SPI_WriteReg(RF_CH);
//	SPI_WriteReg(0x10);
//	CSNhigh();

//	CSNlow();
//	SPI_WriteReg(RX_ADDR_P0);
//	for(x=0;x<=5;x++)
//	{
//		SPI_WriteReg(0xEB);
//	}
//	CSNhigh();

//	CSNlow();
//	SPI_WriteReg(TX_ADDR);
//	for(x=0;x<=5;x++)
//	{
//		SPI_WriteReg(0xEB);
//	}
//	CSNhigh();	

	CSNlow();
	SPI_WriteReg(RX_PW_P0);
	SPI_WriteReg(0x01);
	CSNhigh();

	CSNlow();
	SPI_WriteReg(CONFIG);
	SPI_WriteReg(0x77);			//RX mode
	CSNhigh();
	_delay_ms(100);

}

void DisplayInit(void)
{
	int dat=0;
	
	/*LCD INIT*/
	_delay_ms(20);
	
	dat=0x38;		//Function set: 8-bit/2-line
	Command(dat);
	dat=0x01;		//Clear Display
	Command(dat);
	dat=0x06;		//Entry mode set: Increment, no shift
	Command(dat);
	dat=0x0F;		//Display on, blinking cursor
	Command(dat);
}
	
void Command(int dat)
{
	int e=0;
	e=0x01;			//RS pin off, Enable ON
	PORTE=e;		
	PORTA=dat;
	e=0;			//RS off, Enable OFF (negative edge)
	PORTE=e;		
	_delay_ms(1);
}

void Data(int dat)
{	
	int e=0;
	e=0x03;			//RS pin on, Enable ON
	PORTE=e;
	PORTA=dat;
	e=0x02;			//RS pin ON, Enable OFF (negative edge trigger)
	PORTE=e;
	_delay_ms(1);
}

void CSNlow(void)
{
	_delay_us(10);
	PORTB=PORTB&0xF7; //CSN low
	_delay_us(10);
}

void CSNhigh(void)
{
	_delay_us(10);
	PORTB=PORTB|0x08; //CSN high
	_delay_us(10);
}
  • So you do see that the IRQ changes on both the TX and the RX? When you say you read out the wrong payload, does that mean that the payload is completely wrong and do you do this after a RX_DR IRQ occurs?

    It seems like you only write one byte of addresses? Is this correct? You also have to match the TX address on the transmitter side with the RX_P0 address.

    #define RX_ADDR_P0 0xDD 0xCD 0xFF 0xA2 0x0A //On the Receiver side
    
    #define TX_ADDR 0xDD 0xCD 0xFF 0xA2 0x0A      //Transmitter TX address to match the RX receive address
    
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