nRF52840 VDD voltage during reset in high voltage mode

[ustczzh]

Hi, 

As mentioned in "nRF52840 Product Specification v1.0", I have setup the high voltage mode, and use VDD as an external power of 3.3V by setting NRF_UICR->REGOUT0 to UICR_REGOUT0_VOUT_3V3. 

Normally it work fine, but when I reset the board, and during reset period(when reset pin is low), the VDD output voltage drops to 1.8V. Is this normal? which means that VDD voltage is always 1.8V during reset in high voltage mode regardless of the NRF_UICR->REGOUT0 setting?

 

If not, is there any way to keep it at 3.3V?

Thanks,

[Jørgen Holmefjord]

Hi,

I tested on one of my DKs, and it seems that you are correct, VDD is reading 1.8 V in high voltage mode during reset. Most likely the UICR register config is read during the boot procedure after reset, and during reset, the default value will be used to configure the regulator.

Unfortunately, I can't think of any workaround to keep VDD at 3.3 V during reset.

Best regards,
Jørgen