Quick check of my SPI code & a few related questions

[snoopy20]

Hi,

I've began making a SPI module for programming a PIC16. It only transmits data, so two pins.

My questions are:

1. any obvious errors?
2. does the EVENTS_ENDTX occur when the double buffer is empty? I need to ensure the cpu is a step ahead of the buffer emptying to ensure data continuity.  The 'ENDTX' suggests I could be in a race to fill the buffer again before the SPI has it's next clock. If so, best means to approach it?

inline void GLUE_Start (void) {

  NRF_SPIM0->ENABLE = 1;
}

static void wait (void) {

  while (! NRF_SPIM0->EVENTS_ENDTX) {}
  NRF_SPIM0->EVENTS_ENDTX = 0;
}

static void bulkErase (void) {

  NRF_SPI0->TXD = 0x18; // bulk erase
  nrf_delay_ms(10); // TERAB
}

static void loadAddress (uint24_t value) {

  NRF_SPI0->TXD = 0x80;
  wait();
  NRF_SPI0->TXD = value >> 15
  wait();
  NRF_SPI0->TXD = value >> 7 & 255;
  wait();
  NRF_SPI0->TXD = value & 255;
}

inline void GLUE_UpdateFirmware(void) {

  NRF_GPIO->OUTSET = 1 << CFG_PIN_GLUE_MODE; // into reset
  NRF_GPIO->OUTSET = 1 << CFG_PIN_GLUE_VBUSPOW; // enable 3.3v power

  GLUE_Start();

  NRF_SPI0->TXD = 'M';
  NRF_SPI0->TXD = 'C';
  wait();
  NRF_SPI0->TXD = 'H';
  wait();
  NRF_SPI0->TXD = 'P';
  wait();
  NRF_SPI0->TXD = 'P';
  wait();
  loadAddress(0x8000); // all areas
  bulkErase();

  GLUE_ShutDown();

  NRF_GPIO->OUTCLR = 1 << CFG_PIN_GLUE_MODE; // out of reset
  NRF_GPIO->OUTCLR = 1 << CFG_PIN_GLUE_VBUSPOW; // enable 5v power
}

[snoopy20]

I've went back and updated the code to use EVENT_READY which I'd missed.

So far:

1. configure pins and turn on SPI(M) (I'm not using input)

 NRF_GPIO->PIN_CNF[CFG_PIN_GLUE_DAT] = pinDisconnectInputBuffer | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
 NRF_GPIO->PIN_CNF[CFG_PIN_GLUE_CLK] = (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);

 NRF_SPIM0->PSEL.SCK = CFG_PIN_GLUE_CLK;
 NRF_SPIM0->PSEL.MOSI = CFG_PIN_GLUE_DAT;
 NRF_SPIM0->PSEL.MISO = SPIM_PSEL_MOSI_CONNECT_Disconnected << SPIM_PSEL_MOSI_CONNECT_Pos;
 NRF_SPIM0->ENABLE = SPIM_ENABLE_ENABLE_Enabled << SPIM_ENABLE_ENABLE_Pos;

2. Fill buffer and wait

  NRF_SPI0->TXD = 'M';
  NRF_SPI0->TXD = 'C';
  while (! NRF_SPI0->EVENTS_READY) {}
  NRF_SPI0->EVENTS_READY = 0;

Unfortunately the EVENTS_READY doesn't reach 1 so I'm stuck.

[Susheel Nuguru]

Nothing seems to be configured with SPI CONFIG and FREQUENCY register. I am not sure if the peer is responding anything to these bytes. Can you see if there is any meaninful reception from the peer through the logic analyzer?