Nordic SDK QSPI driver call

[ARPITHA CHANDRASHEKAR]

Hi all,

             We had implemented Nordic QSPI using "nrf_drv_qspi_write" and "nrf_drv_qspi_read" operation , however I am seeing for page to write in flash of 4096 bytes with 512 bytes of QSPI write size limitation its taking 8.6 milli sec , when many streams (sensor data at stretch to be written into system) streams are getting hanged when flash logging is enabled .

So, wanted to check basic operations "nrf_drv_qspi_write" and "nrf_drv_qspi_read" if it blocks other sensor operations to process data ? Is it blocking call? If so how do we configure into dma mode?

Please help

[haakonsh]

What's the write speed of the flash?

The read and write functions are blocking or non-blocking depending on whether you supplied an event handler to nrfx_qspi_init or not. 

[ARPITHA CHANDRASHEKAR]

Hi ,

         Please find the driver code init.

#define QSPI_NAND_FLASH_CONFIG                                        \
{                                                                       \
    .xip_offset  = 0,                         \
    .pins = {                                                           \
       .sck_pin     = QSPI_NAND_FLASH_SCK_PIN,                                \
       .csn_pin     = QSPI_NAND_FLASH_CSN_PIN,                                \
       .io0_pin     = QSPI_NAND_FLASH_IO0_PIN,                                \
       .io1_pin     = QSPI_NAND_FLASH_IO1_PIN,                                \
       .io2_pin     = QSPI_NAND_FLASH_IO2_PIN,                                \
       .io3_pin     = QSPI_NAND_FLASH_IO3_PIN,                                \
    },                                                                  \
    .irq_priority   = (uint8_t)NRFX_QSPI_CONFIG_IRQ_PRIORITY,           \
    .prot_if = {                                                        \
        .readoc     = QSPI_IFCONFIG0_READOC_READ4O,       \
        .writeoc    = QSPI_IFCONFIG0_WRITEOC_PP4O,     \
        .addrmode   = (nrf_qspi_addrmode_t)NRFX_QSPI_CONFIG_ADDRMODE,   \
        .dpmconfig  = false,                                            \
    },                                                                  \
    .phy_if = {                                                         \
        .sck_freq   = NRF_QSPI_FREQ_32MDIV1, \
        .sck_delay  = (uint8_t)NRFX_QSPI_CONFIG_SCK_DELAY,              \
        .spi_mode   = (nrf_qspi_spi_mode_t)NRFX_QSPI_CONFIG_MODE,       \
        .dpmen      = false                                             \
    },                                                                  \
}
/*
    select: 1=512byte,0=256byte.
*/
__STATIC_INLINE void nrf_qspi_ifconfig0_set_page_size(uint8_t select)
{
    if(select == 0)
    {
        NRF_QSPI->IFCONFIG0 &= 0xffffefff;
    }
    else
    {
        NRF_QSPI->IFCONFIG0 |= 0x00001000;
    }
}
uint32_t nand_flash_qspi_init(void)
{
    uint32_t err_code = NAND_SUCCESS;
    nrf_drv_qspi_config_t config = QSPI_NAND_FLASH_CONFIG;

    err_code = nrf_drv_qspi_init(&config, NULL, NULL);
    if(NRFX_SUCCESS != err_code)
    {
        NRF_LOG_INFO("QSPI init error,err_code=%d",err_code);
        return err_code;
    }
    nrf_qspi_ifconfig0_set_page_size(1);
    return NRFX_SUCCESS;
}

[ARPITHA CHANDRASHEKAR]

Also,

        We are using MT29F4G01ABBFDWB, MT29F4G01ABBFD12 flash series .

Array performance
– 83 MHz clock frequency (MAX)
– Page read: 25μs (MAX) with on-die ECC disabled;
135μs (MAX) with on-die ECC enabled
– Page program: 200μs (TYP) with on-die ECC disabled;
240μs (TYP) with on-die ECC enabled
– Block erase: 2ms (TYP)

What i have profiled time to write single page of 4096 bytes is 8.6 milli sec. and we have streams running at 100 to 500 Hz , 50 Hz , also we have combination.

Another observation is with ECC being enabled , since i believe it takes more time to write streams hang faster. So i wanted to know if driver is blocking call, because we have system which needs to support multiple sensors  and interrupts.

[haakonsh]

ARPITHA CHANDRASHEKAR said:

err_code = nrf_drv_qspi_init(&config, NULL, NULL);

 The second argument lacks a pointer to an event handler, so this driver runs in blocking mode. 

[ARPITHA CHANDRASHEKAR]

Hi,

void qspi_init_call_back(nrfx_qspi_evt_t event, void *p_context)
{
if (event == NRFX_QSPI_EVENT_DONE) {
//add flag to distr
adi_osal_SemPost(file_update_task_evt_sem);
}
}

uint32_t nand_flash_qspi_init(void)
{
//create semaphore
adi_osal_SemCreate(&file_update_task_evt_sem, 0);

uint32_t err_code = NAND_SUCCESS;
nrf_drv_qspi_config_t config = QSPI_NAND_FLASH_CONFIG;

err_code = nrf_drv_qspi_init(&config, qspi_init_call_back, NULL);

if(NRFX_SUCCESS != err_code)
{
NRF_LOG_INFO("QSPI init error,err_code=%d",err_code);
return err_code;
}
nrf_qspi_ifconfig0_set_page_size(1);
return NRFX_SUCCESS;
}

In this case , call back will be called any operation read/write/erase?