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How to set PDM_CLK properly, when it is lower than default?

Hi!
I ran into a little misunderstanding in setting up clock frequency for PDM. I need to work with lower clock frequency than default - 0.64 MHz. I see, that PDM_CLK = 32/Prescaler, and Prescaler correlates with the content of PDMCLKCTRL register. It seems, that change PDMCLKCTRL by 0x00400000 changes Prescaler by 1. Assuming that, I found necessary values of Prescaler and PDMCLKCTRL (PDMCLKCTRL = 0x03800000, Prescaler = 50). But tests showed that with these settings real PDM_CLK is lower than expected, about 0.45 MHz.
My question is: how to correlate PDMCLKCTRL and Prescaler value? Is there some equation for that?

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