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Occasional reset after TX, VDD plots inside

I'm working on a project that uses the Fanstel BC840m module. The project uses a custom PCB design, and everything was going smoothly until... I enabled DCDC1, stopped building in DEBUG, and switched to battery.

Issue

When I enable use of DCDC1 I experience frequent (~5% probability) resets after BLE advertisements. 

Hardware

  • Custom PCB
    • XTAL populated and configured
  • Fanstel BC840m (52840 based)
    • Docs state the module has components to enable DCDC1
  • Coin-cell battery (CR2032)

Software

  • SDK v16
  • S140 v7.0.1

Observations

  • Reset occurs immediately after completion of BLE advertisements
    • Verified by oscilloscope on VDD
  • Reset occurs, with less frequency, when powered by Nordic PPK and voltage reduced to ~2.5-2.5V
  • I have many custom PCB units. Reset frequency varies by unit. Some are very bad (seconds), some are better (hours)

Troubleshooting steps

  • First instinct is voltage drop problem, so I added additional capacitance to the host PCB, and moved that closer to the Fanstel module connections. This might have made a slight improvement, but not much if any.
  • I've attached an oscilloscope to VDD to watch for drops. 2 snaps are attached.
  • I've read nearly every post here that mentions DCDC. I've learned a lot, and I know that coin-cell batteries as a power supply are difficult... But nothing I've seen seems to explain this.

Screenshots

Here are two screenshots watching VDD during a BLE advertisement TX cycle. Note: I have masked off 2 advertising channels, so there is only 1 BLE transmission per cycle. The first screenshot here is of a "clean" TX where the unit did not reset. I labeled several key events with letters A, B, C, D. Can someone tell me what is causing D? D is exactly where the reset occurs, you can compare the two screenshots to see. Sorry they're different time-scales so they don't line up perfectly.

A - Some sort of soft wakeup, I'm guessing to get the CPU and radio ready for TX

B - DCDC power-up and charge

C - BLE TX

D - ? Why the dip? Is this where it's switching back to LDO? This is the point at which resets occur. See next picture. 

/resized-image/__size/320x240/__key/support-attachments/beef5d1b77644c448dabff31668f3a47-07a8564767104549a73a3cf71d0992d9/Screenshot-from-2020_2D00_08_2D00_06-08_2D00_17_2D00_15.png

/resized-image/__size/320x240/__key/support-attachments/beef5d1b77644c448dabff31668f3a47-07a8564767104549a73a3cf71d0992d9/Screenshot-from-2020_2D00_08_2D00_06-08_2D00_17_2D00_41.png

FWIW -- I also have a custom PCB that uses the Fanstel BT840 module (still 52840 based). Under the exact same software configuration (and nearly equivalent schematic) I have not experienced a single reset. 

So does anyone have ideas? What is happening at D? Is it something I can control to prevent the reset? Any ideas on what the underlying cause may be? I would love to find a software work-around, even if there is some penalty, but I'd also like to identify the true cause and resolve that for the next HW spin.

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