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Having trouble getting interrupts on the TX side

I've been seeing issues with getting an interrupt on the TX side. I reckon it could also be linked to the RX module cause if the payload isn't sent, the interrupt on the TX side won't be asserted?

Snippet for transmitting payload:

NRF_STATUS nRF24_TransmitPayload(nrfl2401 *nrf, uint8_t *data, uint8_t size)
{
	printf ("\n ********** Sending payload data %c ************\n", *data);

	// switch to TX mode
	nRF24_SetConfigureRegister(nrf, nRF24_PRIM_RX, TX_CTRL);		// todo - switch to TX mode here!

	nrf->state = NRF_TX_BUSY;

	char txt[20] = "\nTX payload_";
	sprintf (txt, strcat(txt, "%d"), 0);

	nRF24_WriteRegister(nrf, nRF24_CMD_W_PAYLOAD, data, size, txt);

	nRF24_PrintDetails(&nrfRadio);

	SET_CE();

	while(nrf->state == NRF_TX_BUSY); // THIS AND the following line should be in the callback I guess

	RESET_CE();
}

I have printed the relevant registers' contents for debugging.

TX:

 ************* RESETTING *************
Reading Default Config:          0x00 ----------- 0x0e02
Setting CONFIG:          0x02008 ----------- 0x0e00
Reading Default Status:          0x0700 ----------- 0x0e0e
Reading Default RF setup:          0x0600 ----------- 0x0e0a
Setting default RF_SETUP:          0x0260e ----------- 0x0e00
Reading Default RF_CH:          0x0500 ----------- 0x0e00
Setting default RF_CH:          0x02602 ----------- 0x0e00
Reading FEATURE reg:          0x01d00 ----------- 0x0e04
Set default FTR_REG:          0x03d00 ----------- 0x0e00
Reading DPL_Px:          0x01c00 ----------- 0x0e01
Reset DPL_Px:          0x03c00 ----------- 0x0e00

TX address:          0x30d7d7d7d7d7 ----------- 0xe000
RX_DATA_PIPE0:          0x02201 ----------- 0x0e00
Reading EN_AA: _Indx: 4
Stream buffer: temp
temP: 23

 ********** Sending payload data 2 ************
Read Config register:          0x00 ----------- 0x0e02
Write Config register:          0x02002 ----------- 0x0e00

TX payload_0:          0x0a03233 ----------- 0x0e0000

 ------------- PRINTING details --------
Config:          0x00 ----------- 0x0e02
RX_ADDR_P0:          0xa000 ----------- 0xed7d7d7d7d7
EN_AA:          0x0100 ----------- 0x0e3f
TX_ADDR_REG:          0x10000 ----------- 0xed7d7d7d7d7
RF_Setup:          0x0600 ----------- 0x0e0a
RF_CH Reg:          0x0500 ----------- 0x0e00
ADDRESS WIDTH:          0x0300 ----------- 0x0e03
OBSERVE_TX:          0x0800 ----------- 0x0e03
FEATURE_REG:_Indx: 4

RX:

================ SPI Configuration ================
CSN Pin  	 = CE0 (PI Hardware Driven)
CE Pin  	 = Custom GPIO22
Clock Speed	 = 8 Mhz
================ NRF Configuration ================
STATUS		 = 0x0e RX_DR=0 TX_DS=0 MAX_RT=0 RX_P_NO=7 TX_FULL=0
RX_ADDR_P0-1	 = 0xd7d7d7d7d7 0xc2c2c2c2c2
RX_ADDR_P2-5	 = 0xc3 0xc4 0xc5 0xc6
TX_ADDR		 = 0xe7e7e7e7e7
RX_PW_P0-6	 = 0x20 0x00 0x00 0x00 0x00 0x00
EN_AA		 = 0x3f
EN_RXADDR	 = 0x03
RF_CH		 = 0x00
RF_SETUP	 = 0x0f
CONFIG		 = 0x0a
DYNPD/FEATURE	 = 0x3f 0x04
Data Rate	 = 2MBPS
Model		 = nRF24L01+
CRC Length	 = 8 bits
PA Power	 = PA_MAX
Start listening on pipe 0

in the ISR, I see the status register's value is 0x1E - meaning the MAX RT is asserted?

Parents
  • Hi 

    You should always get an interrupt on the TX side, whether or not the receiver is working. 

    If you have ACK enabled you will get the TX_DS interrupt when you receive an ACK, and if no ACK is received you should get the MAX_RT interrupt. 

    Can you confirm what the CONFIG register contains on the TX side?
    Assuming the upper 4 bits are all 0 then all interrupts should be enabled. 

    A STATUS register value of 0x1E implies that the MAX_RT interrupt occurred, that is correct. 

    Have you checked the IRQ pin from your TX module manually to see if it is cleared or not?

    Best regards
    Torbjørn

Reply
  • Hi 

    You should always get an interrupt on the TX side, whether or not the receiver is working. 

    If you have ACK enabled you will get the TX_DS interrupt when you receive an ACK, and if no ACK is received you should get the MAX_RT interrupt. 

    Can you confirm what the CONFIG register contains on the TX side?
    Assuming the upper 4 bits are all 0 then all interrupts should be enabled. 

    A STATUS register value of 0x1E implies that the MAX_RT interrupt occurred, that is correct. 

    Have you checked the IRQ pin from your TX module manually to see if it is cleared or not?

    Best regards
    Torbjørn

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