Maximum number of interrupt enabled pins?

[Florin]

Hi,

Sorry for the noob questions but I'm trying to understand the GPIOTE abstraction and terminology, specifically the events, interrupts and tasks. My understanding is that GPIOTE can have events (signal transitions on input pins) generating interrupts that can be processed via GPIOTE_IRQHandler that can be sorted out by inspecting the RF_GPIOTE->EVENTS_IN registers . There are a total of four events that can be configured to trigger interrupts, using the NRF_GPIOTE->CONFIG[0..3] registers (channels?). I understand that the sense mechanism can also be used to detect pin changes but doesn't track the actual pin that transitioned state. Does this mean that I can configure only four input pins with interrupt capability?

Thanks! florin

PS: A GPIO task can set/clear another pin as a result of an event but it didn't seem relevant here. Anyway, can it only used in conjunction with PPI's Task end-point?

[Hung Bui]

Hi Florin,

1. As discussed in the other case, SENSE is level triggered, not edge triggered. So if you have one pin stays high, PORT even will always be on and can not trigger a new interrupt until all 2 pin are low. In this case either do polling as suggested in the other case or you will have to change the SENSE level of the pin that always on to low to detect the other pin.

2. The PORT event is only generated when DETECT signal move from low to high. The DETECT signal is shared between all pins. So DETECT signal will remain high until all pins clears SENSE (both pins to low level as in your example).

So if both pins remains high, PORT event is triggered only once, at the beginning when first pin changed from low to high or when PORT event is enabled, if the pin is already high before.