Single-cycle 32 bit multiplier issue

[Pher]

Hi, i would like to know how can i enable the single-cycle 32 bit multiplier buit-in on the M0 Core. Checking the assembly code every multiplication calls to __aeabi_dmul which i think use shifts to perform the math operation. Can someone put this clear for me?

Thanks in advance.

[Max C.]

The hardware multiplier is automatically taken into account by the compiler when generating code (if your environment is setup correctly) because it is also a standard feature of the Cortex-M0;

What you are actually seeing is that your compiler is generating an instruction for a floating point multiplication (specifically between double type arguments) but the Cortex M0 doesn't have support for any hardware floating point (it uses software instructions for floating maths so it is way slower);

instead it has built-in support for integer 32 bit x 32 bit multiplication (that is, the single cycle multiplier you are speaking of)