ADC/GPIO Required timing

[ran]

Hi,

 

We are looking for a guideline to trigger GPIO and SAADC sampling at the same time.

Our purpose is to sample every 20 m

Hi,

 

We are looking for a guideline to trigger GPIO and SAADC sampling at the same time.

Our purpose is to sample every 20 ms - 5 ADC channels, 16 samples for each channel, at total 80 samples – sample rate of 25us.

Upon enabling PPI we need to set a GPIO and when finish sampling clear the GPIO.

For now, we are using NRF_DRV_TIMER, setting the timer channel in extended compare mode, configured to 20 ms. In the Event handler of the timer, we configure SAADC write buffer, enable the PPI channel and setting the GPIO.

Upon getting the SAADC callback we disable PPI channel and clearing the GPIO, and wait for timer event and so on.

Using this implementation we have latency between the ADC sampling and the GPIO, therefore we are looking for a proper way to sync between these 2 tasks.

The picture below shows the required timing:

s - 5 ADC channels, 16 samples for each channel, at total 80 samples – sample rate of 25us.

Upon enabling PPI we need to set a GPIO and when finish sampling clear the GPIO.

For now, we are using NRF_DRV_TIMER, setting the timer channel in extended compare mode, configured to 20 ms. In the Event handler of the timer, we configure SAADC write buffer, enable the PPI channel and setting the GPIO.

Upon getting the SAADC callback we disable PPI channel and clearing the GPIO, and wait for timer event and so on.

Using this implementation we have latency between the ADC sampling and the GPIO, therefore we are looking for a proper way to sync between these 2 tasks.

The picture attached shows the required timing

Thanks, 

Ran

[ran]

Correct text : 

Hi,

 We are looking for a guideline to trigger GPIO and SAADC sampling at the same time.

Our purpose is to sample every 20 ms - 5 ADC channels, 16 samples for each channel, at total 80 samples – sample rate of 25us.

Upon enabling PPI we need to set a GPIO and when finish sampling clear the GPIO.

For now, we are using NRF_DRV_TIMER, setting the timer channel in extended compare mode, configured to 20 ms. In the Event handler of the timer, we configure SAADC write buffer, enable the PPI channel and setting the GPIO.

Upon getting the SAADC callback we disable PPI channel and clearing the GPIO, and wait for timer event and so on.

Using this implementation we have latency between the ADC sampling and the GPIO, therefore we are looking for a proper way to sync between these 2 tasks.

The picture below shows the required timing:

[Jørgen Holmefjord]

Hi,

If you sutup the GPIO using GPIOTE, you wan use PPI to toggle the pin when the END event is generated by the SAADC peripheral, when your buffer is full.

There is a GPIOTE example available in the SDK that shows how you setup this.

You can also hook up the TIMER event to a second PPI channel to toggle the GPIO at the start of sampling as well, or you can control it from the code as you do now. Note that once the GPIO is setup with GPIOTE, you can only control it using GPIOTE functions, not through the GPIO peripheral directly anymore.

Best regards,
Jørgen