I have two SPI buses on my board, with a different type of slave chip on each. Only a few bytes are read from each during boot. When I use SPIM0, 1 or 2 for them there is no effect on the sleep current (about 2uA in my system). When I use SPIM3 for either bus, the sleep current after the first SPI transfer goes up to 700 uA and stays there forever (until reset). The only change to the code is to change the module used.
I also tried it with SPI Extended features enabled - same results.
Here is the code:
nrfx_spim_config_t spi_config = NRFX_SPIM_DEFAULT_CONFIG; spi_config.frequency = IMU_SCK_FREQUENCY; // 4M spi_config.ss_pin = IMU_NRFX_SPIM_SS_PIN; spi_config.miso_pin = IMU_NRFX_SPIM_MISO_PIN; spi_config.mosi_pin = IMU_NRFX_SPIM_MOSI_PIN; spi_config.sck_pin = IMU_NRFX_SPIM_SCK_PIN; spi_config.ss_active_high = false; spi_config.orc = 0xFF; spi_config.mode = 0; APP_ERROR_CHECK(nrfx_spim_init(&spi, &spi_config, spim_event_handler, NULL)); nrfx_spim_xfer_desc_t xfer_desc = NRFX_SPIM_XFER_TRX(m_tx_buf, m_tx_length, m_rx_buf, m_rx_length); // Reset rx buffer and transfer done flag memset(m_rx_buf, 0, m_rx_length); spi_xfer_done = false; // Start the SPI sequence APP_ERROR_CHECK(nrfx_spim_xfer(&spi, &xfer_desc, 0)); while (!spi_xfer_done) { __WFE(); /* sleep, wait for event to wake */ }
Why is SPIM3 acting so different? This seems like more of a possible SoftDevice problem than hardware since I would expect the SPI to stop when not in use. I am using S113 version 7.2.0, and the SDK is version 17.0.2.