Idling with low-speed timer

[cth]

Hi,

I am trying to build a low power device using the nRF51422 SoC without a Soft Device. I need a timer to occasionally wake up the chip and as I read the product specification it should be possible to achieve a current consumption of 250uA when using only the 1MHz low-speed timer and a 16MHz crystal oscillator (PS 3.1, table 22, page 40). However, with an example from SDK 8.0 as starting point and the nRF51 development kit, I have not been able to get the power lower than approximately 550uA. I use the current measurement guideline from the DK user guide. What can be done to lower the current further?

A sub question: When programming using IAR the current consumption is considerable higher until the development kit is restarted. Is it possible to avoid this?

Best Regards, cth

[Susheel Nuguru]

Which SDK example did you use for this timer functionality?

answer to sub question) It is possible that IAR leaves the chip in debug mode after flashing which consumes more power. I do not have IAR setup now, so I cannot confirm this.

[Susheel Nuguru]

first of all I think the power profiling was made by programming the timer directly without using any libraries. The example you mentioned uses the Timer library and the overhead of CPU to execute all those library add ups to contribute for the extra power you are noticing. As this is interrupt driven, and you are not using the softdevice and if lower power is very important for your usecase, I advise you not to use the library and configure the Timer in your app directly. look at the peripheral\gpiote example to configure the timers directly without using the library.

second thing is that just one call to __WFI() is not very efficient way to go to low power mode, i shall ask someone to fix that in the SDK. Read the post below and the answer from Carles is how it should be.