SPIS select pin

[hossein_m]

Hello Nordic,

I'm working with NRF52840 (with SDK 16 and softdevice s140 7.0.1) in my project. I need to work with another chip through SPI. This chip is the master and NRF should be the slave.

The following picture is the required protocol flow to start the conversation and then send and receive data.

As you can see, the SS pin from SPI master doesn't change after fetch data or command data which is a problem, because as I understood from NRF52840 documents, the only way to get a NRF_DRV_SPIS_XFER_DONE event from SPIS and change TX and RX buffers is when select-pin goes high, which can't happen here due to this design.

Is there any way to perform SPIS without select pin and perform events based on the amount of data received or sent? or the absence of the clock signal?

Or more generally, is there anyway to change the SPIS functionality in a way that is suitable with this design? 

Thank you.

[Turbo J]

Redesign the SPI protocol. It is not doable with an NRF chip (and BLE running).

Reason is that BLE basically blocks the CPU during radio operation. If that occurs during the Fetch/Slave cycle either the master must wait for a looooong time or the slave will misses the timing. Also the master has no way of predicting when these radio operations will occur.

Very bad for throuput and implementation complexity even in the master.

Side note: If these "delay slots" are small, this protocol would need an FPGA as SPI slave.

[hossein_m]

Thanks,
I don't understand your note about "delay spots". Clock speed of this protocol is OK with NRF52840 requirements if that's what you mean.