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High impedance problem during watchdog reset

Hello,

I'm working on a circuit which has a pin connected to a pull-up resistor, using the nRF52 DK and SEGGER Embedded Studio 5.20 to develop the software.

This pin is configured as output and it manages the power supply unit.

If a watchdog reset condition occurs, I would like this pin to behave like an high impedance input, so the logic status of the PSU is not affected.

This is the code I've written to test this condition:

int main(void)
{
    int32_t reset_reason;

    reset_reason = NRF_POWER->RESETREAS;
    NRF_POWER->RESETREAS = NRF_POWER->RESETREAS;
    
    nrf_gpio_cfg_output(CLR_PIN_NUMBER);
    nrf_delay_ms(1);
    nrf_gpio_pin_set(CLR_PIN_NUMBER);
    
    wdt_init(); 
    
    nrf_gpio_cfg_input(CLR_PIN_NUMBER, NRF_GPIO_PIN_NOPULL);
    nrf_delay_ms(1);
    while(true);
}

Using an oscilloscope to monitor the circuit, I've seen that on a wdt reset the status of the pin CLR_PIN_NUMBER changes to 0, and this is not desirable because it shuts down the PSU.

If I instead use the following code, just removing the nrf_gpio_cfg_output line:

int main(void)
{
    int32_t reset_reason;

    reset_reason = NRF_POWER->RESETREAS;
    NRF_POWER->RESETREAS = NRF_POWER->RESETREAS;
    
    nrf_gpio_pin_set(CLR_PIN_NUMBER);
    
    wdt_init(); 
    
    nrf_gpio_cfg_input(CLR_PIN_NUMBER, NRF_GPIO_PIN_NOPULL);
    nrf_delay_ms(1);
    while(true);
}

...the voltage of the pin remains on high status after the wdt reset, as desired.

I need some advice to correctly configure the pin to make it behave like an high impedance input and prevent the wdt reset to change its status.

Thanks in advance.

Parents
  • Hi,

    So a WDT reset should set the GPIO pin to it's reset value, which is as INPUT with the Input buffer disconnected, which makes it effectively High Impedance. Note that this is after the reset has been completed. During the reset it's undefined, which is probably where you measure the pin being 0 at some point (possibly a glitch).

    Removing nrf_gpio_cfg_output() but still setting the pin doesn't quite make sense. I would expect the application to return an error at this point. It seems that you're still seeing some issues with the last method since you kinda get the intended behavior but still wants an advice on how to do it correctly??

    • Why are you setting the pin to High state?
    • You could try adding a capacitor on the line. It should take care of any possible glitches. 

    regards

    Jared 

  • Hello Jared,

    Thanks for your reply. The circuit is powered through a IC monitor to achieve the best battery performance. The IC monitor has a reset pin connected to the CPU, and it must remain to High state in order to keep the circuit on, until the system is turned off by the CPU, that's why a reset condition should not interfere with the pin status.

    The second method I used maintains the High state of the pin on reset, but I am not sure it is the correct way to configure it, that's why I wanted to ask for advice.

    Best regards.

Reply
  • Hello Jared,

    Thanks for your reply. The circuit is powered through a IC monitor to achieve the best battery performance. The IC monitor has a reset pin connected to the CPU, and it must remain to High state in order to keep the circuit on, until the system is turned off by the CPU, that's why a reset condition should not interfere with the pin status.

    The second method I used maintains the High state of the pin on reset, but I am not sure it is the correct way to configure it, that's why I wanted to ask for advice.

    Best regards.

Children
  • Hi,

    I understand by High state that you're referring to a logical High. High impedance on the other hand is interpreted as the pin not being driven High nor Low, it's effectively floating. 

    You wrote in your original problem statement:

    If a watchdog reset condition occurs, I would like this pin to behave like an high impedance input, so the logic status of the PSU is not affected.

     High impedance is the default state of a pin on the nRF after a reset. As a reset will configure the pin as input, with the input buffer disconnected. 

    By reading your newest reply, I understand that you want to keep the pin in High state during and after a reset to prevent it shutting down the circuit, as it controls a IC monitor. The state of a pin during a reset is undefined, which means that it can't be controlled by the nRF. Some external solution would be necessary to force it High. 

    Nost99 said:

    The second method I used maintains the High state of the pin on reset, but I am not sure it is the correct way to configure it, that's why I wanted to ask for advice.

     It doesn't quite make sense for me why the second method does anything. Trying to set a pin as High without configuring it as input will have no effect on the nRF. Maybe there is some external part on your test setup that is pulling up the pin? 

    regards

    Jared 

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