nRF5340 MCK settings

[WesC]

If i set register CONFIG.MCKEN to 1 so Master Clock generator is running and the output is on PSEL.MCK

and in the CONFIG.CLKCONFIG register i set the source to PCLK32M then enable the BYPASS

would i get the PCLK32M clock output directly on the PIN.PORT set in PSEL.MCK?

[helsing]

Using the BYPASS feature in CONFIG.CLKCONFIG allows you to get the 32MHz peripheral clock directly on the MCK pin, that is correct. The CONFIG.MCKFREQ register will only work for the values listed in the documentation, and will not allow you to go higher than 16MHz.

[WesC]

It has been a while, but the customer still has a question about the BYPASS feature.  I dont think what he is looking to do is possible, but i would like your opinion.

When you set MCLK as BYPASS mode, the master clock generator no longer functions. they would like to BYPASS MCLK pin as ACLK or HFCLK and internal circuit still use the master clock generator. Not sure if this config is feasible.

[helsing]

Hi wes, thank you for the follow up question. It does not sound feasible to us either, however, we are not sure whether we understand the question correctly. Would you be able to add some more details, or could you perhaps rephrase the question?

[helsing]

A team member points to the PS where the following is stated next to BYPASS:

'Bypass clock generator. MCK will be equal to source input.

If bypass is enabled the MCKFREQ setting has no effect.'

Does this answer your question?

[WesC]

Ok.  If you set the CONFIG.CLKCONFIG to BYPASS.  the MCK will be equal to the Source Input and MCKFREQ setting will have no effect.  The customer would like the BYPASS to set the PSEL.MCK to the HFCLK or ACLK source, but still use the MCK and CONFIG.MCKFREQ for internal clocking.  Please see Figure 62 of the nRF5340 PS.  I am not sure of their use case for this, but this does not appear to be feasible based on the FIGURE 62, unless the connections are not HW and only SW interconnected.