I am doing the procedure described in the nRF52840 specification, figure 193 "UARTE reception with forced stop via STOPRX".
I am using 1Mbps with hardware flow control.
It works first, but when it has been running for a while, (filling buffers and flushing) the RXD.AMOUNT register is not cleared anymore when starting the FLUSHRX task. So when the ENDRX event occurs after this flush operation, the RXD.AMOUNT register still holds the value from the last rx task. While it is working, RXD.AMOUNT is cleared when starting FLUSHRX and then at the ENDRX event, the RXD.AMOUNT register holds the number of bytes written to the DMA buffer by the FLUSHRX task (usually one byte in my case).
What can be the cause of this?
Is this a known problem in the nrf52840 hardware? Can something be done to prevent it from happening?
