nrf5340 nrfx spis no events

[zuppiden]

Hello

I am trying to configure the spis with the nrfx drivers. My code is as follows:

#include <zephyr.h>
#include <sys/printk.h>
#include "nrfx_spis.h"

#define PIN_SCK 4
#define PIN_MOSI 5
#define PIN_MISO 6
#define PIN_CSN 7
#define SPIS_NR 3

nrfx_spis_t spis_t = NRFX_SPIS_INSTANCE(SPIS_NR);
nrfx_spis_config_t spis_config_t = NRFX_SPIS_DEFAULT_CONFIG(PIN_SCK,PIN_MOSI,NRFX_SPIS_PIN_NOT_USED,PIN_CSN);

uint8_t rx_buffer[2];
uint8_t tx_buffer[2];

void spis_event_handler_t(nrfx_spis_evt_t const *p_event, void *p_context){
    printk("received\n");
    int err;
    switch(p_event->evt_type){
        case NRFX_SPIS_XFER_DONE:
            err = nrfx_spis_buffers_set(&spis_t, tx_buffer, sizeof(tx_buffer), rx_buffer, sizeof(rx_buffer));
            if(err != NRFX_SUCCESS){
                printk("Error with setting.\n");
            }
            break;
        case NRFX_SPIS_BUFFERS_SET_DONE:
            printk("buffers set\n");
            break;
        case NRFX_SPIS_EVT_TYPE_MAX:
        
            break;
        default:
            ;
    }
}

void init_spis(){
    int err;
    err = nrfx_spis_init(&spis_t,&spis_config_t,spis_event_handler_t,NULL);
    if(err != NRFX_SUCCESS){
        printk("Error with init.\n");
    } else {
        printk("SPIS started.\n");
    }
    err = nrfx_spis_buffers_set(&spis_t, tx_buffer, sizeof(tx_buffer), rx_buffer, sizeof(rx_buffer));
    if(err != NRFX_SUCCESS){
        printk("Error with setting.\n");
    }
}

void main(void)
{
    init_spis();
}

I enabled the nrfx SPIS driver and the nrfx SPIS3 instance via Segger Embedded and I am using ncs v1.4.0.

My serial output is:

*** Booting Zephyr OS build v2.4.0-ncs1  ***
SPIS started.

However, shouldn't the nrfx_spis_buffers_set trigger the NRFX_SPIS_BUFFERS_SET_DONE event and "received" and "buffers set" should also be sent to the serial output?
Did I do something wrong and my event handler function is not getting called?

[Håkon Alseth]

Hi,

 

You will need to setup the interrupt vector manually, using the zephyr's IRQ_CONNECT*() API, similar to what is done here:

https://github.com/Rallare/fw-nrfconnect-nrf/blob/nrf9160_samples/samples/nrf9160/nrfx_timed_signal/src/main.c#L128-L132

 

The handler you want to route, since you use SPIS3, would be "nrfx_spis_3_irq_handler".

Could you try this and see if that works?

 

Kind regards,

Håkon

[zuppiden]

Thanks for your answer. This makes sense and I added it. However it still doesn't work.

#include <zephyr.h>
#include <sys/printk.h>
#include "nrfx_spis.h"

#define PIN_SCK 4
#define PIN_MOSI 5
#define PIN_MISO 6
#define PIN_CSN 7
#define SPIS_NR 3

nrfx_spis_t spis_t = NRFX_SPIS_INSTANCE(SPIS_NR);
nrfx_spis_config_t spis_config_t = NRFX_SPIS_DEFAULT_CONFIG(PIN_SCK,PIN_MOSI,NRFX_SPIS_PIN_NOT_USED,PIN_CSN);

uint8_t rx_buffer[2];
uint8_t tx_buffer[2];

void spis_event_handler_t(nrfx_spis_evt_t const *p_event, void *p_context){
    printk("received\n");
    int err;
    switch(p_event->evt_type){
        case NRFX_SPIS_XFER_DONE:
            err = nrfx_spis_buffers_set(&spis_t, tx_buffer, sizeof(tx_buffer), rx_buffer, sizeof(rx_buffer));
            if(err != NRFX_SUCCESS){
                printk("Error with setting.\n");
            }
            break;
        case NRFX_SPIS_BUFFERS_SET_DONE:
            printk("buffers set\n");
            break;
        case NRFX_SPIS_EVT_TYPE_MAX:
        
            break;
        default:
            ;
    }
}

static void manual_isr_setup()
{
    IRQ_DIRECT_CONNECT(SPIM3_SPIS3_TWIM3_TWIS3_UARTE3_IRQn, 0, nrfx_spis_3_irq_handler, 0);
    irq_enable(SPIM3_SPIS3_TWIM3_TWIS3_UARTE3_IRQn);
}

void init_spis(){
    int err;
    err = nrfx_spis_init(&spis_t,&spis_config_t,spis_event_handler_t,NULL);
    if(err != NRFX_SUCCESS){
        printk("Error with init.\n");
    } else {
        printk("SPIS started.\n");
    }
}

void main(void)
{
    int err;
    init_spis();
    manual_isr_setup();

    err = nrfx_spis_buffers_set(&spis_t, tx_buffer, sizeof(tx_buffer), rx_buffer, sizeof(rx_buffer));
    if(err != NRFX_SUCCESS){
        printk("Error with setting.\n");
    }
}

My serial output is still:

*** Booting Zephyr OS build v2.4.0-ncs1  ***
SPIS started.

I went through the code with the debugger and the nrf53 enters the function spis_state_entry_action_execute in nrfx_spi.c. It then goes to the case SPIS_BUFFER_RESOURCE_REQUESTED and returns then with NRFX_SUCCESS and never reaches SPIS_BUFFER_RESOURCE_CONFIGURED where the event type would be set.

[Håkon Alseth]

Hi,

 

I tried your fw, by pasting the source into zephyr/samples/basic/blinky, and configuring this with board nrf5340pdk_nrf5340_cpuapp, and got this print out:

*** Booting Zephyr OS build v2.4.0-ncs1  ***
SPIS started.
received
buffers set

 

Additional kconfig settings:

CONFIG_NRFX_SPIS3=y

 

Kind regards,

Håkon

[zuppiden]

I did the same and it's still not working...

What program do you have on the network core when running the spi code? I have hci_rpmsg from the ncs 1.4.0 on it. Does that have an influence?

Might my PDK be broken?

[Håkon Alseth]

Hi,

 

zuppiden said:

What program do you have on the network core when running the spi code?

Its completely empty at my end, although it should not matter, as I keep the net core in sleep.

 

Try erasing the flash on both cores:

nrfjprog --recover -f nrf53 --coprocessor CP_NETWORK

nrfjprog --recover -f nrf53 --coprocessor CP_APPLICATION

 

Then flash again to see if this helps.

 

Kind regards,

Håkon

[zuppiden]

I erased the flash on both cores and it didn't work and I got a new pdk and it still doesn't work. I checked using the debug mode and the nrfx_spis_3_irq_handler never gets called. Am I missing some configs to enable IRQs in Zephyr?

[zuppiden]

In fact, if I set a brakepoint at IRQ_DIRECT_CONNECT the debugger never reaches it. If I set a breakpoint at irq_enable it does reach it. It's like the IRQ_DIRECT_CONNECT command gets skipped.

static void manual_isr_setup()
{
    IRQ_DIRECT_CONNECT(SPIM3_SPIS3_TWIM3_TWIS3_UARTE3_IRQn, 0, nrfx_spis_3_irq_handler, 0);
    irq_enable(SPIM3_SPIS3_TWIM3_TWIS3_UARTE3_IRQn);
}