Single layer 3/3 mil fanout of the inner row of aQFN package?

[BartT]

I am designing a PCB for the nRF52833 aQFN chip. To reduce the cost of the PCB I would like to fanout the inner row of the IC package on a single layer by using 3/3mil traces, instead of using via in pad technology. According to my calculations this should be possible. 

Is this recommended?

Thanks in advance

BartT

[ketiljo]

Sounds hard to do. You must check with your PCB supplier if that's ok or not.