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SAADC + TIMER for repeated scan of two channels

Hi,

I'm setting up a timer to invoke (via PPI) the ADC in scan mode. It'll read to channels with MAXCNT of 10,000.

The ADC built in timer has a value from 

[80..2047]

Representing the frequency range (max being 200KHz). I imagine 200KHz represents the minimum sample hold time (3us) and 2us for additional set-up per channel. 

Questions

1.  for two channels should I be setting the timer for 100KHz, or will the second TASK_SAMPLE channel simply be ignored in SCAN mode?

2. if the hold time isn't 3us the timer frequency should ideally adjusted as to synchronise the TASK_SAMPLE to just after the last EVENT_STOP has occurred?

The datasheet shows an effective 9 bits of resolution at 200KHz with 3us sample which isn't good enough for my application. Where I'm potentially confused is by reducing the timer frequency wouldn't it just leave more space between the EVENT_STOP and the next TASK_SAMPLE trigger, that is, it would have no bearing on the actual ADC process. Therefore -


3. The maximum resolution of a 3us sample is 9 bit.

Thanks, Andrew

Parents
  • // ADC takes 2us per channel + sample time. 2x channels @ 5us = 2*5*2 = 20us

    #define ADC_TIME_PERCHANNEL 2 // us
    #define ADC_AC_CHANNELS 2
    #define ADC_AC_SAMPLETIME 5 // us

    #define ADC_TIMER_COUNT (16U * ((ADC_TIME_PERCHANNEL * ADC_AC_CHANNELS * ADC_AC_SAMPLETIME)))
    #define ADC_FREQUENCY (16000000U/ADC_TIMER_COUNT)
    #define ADC_BUFFER_SAMPLES ((uint32_t) (ADC_FREQUENCY * ADC_AC_CHANNELS * 0.25)) // 0.25s is required

Reply
  • // ADC takes 2us per channel + sample time. 2x channels @ 5us = 2*5*2 = 20us

    #define ADC_TIME_PERCHANNEL 2 // us
    #define ADC_AC_CHANNELS 2
    #define ADC_AC_SAMPLETIME 5 // us

    #define ADC_TIMER_COUNT (16U * ((ADC_TIME_PERCHANNEL * ADC_AC_CHANNELS * ADC_AC_SAMPLETIME)))
    #define ADC_FREQUENCY (16000000U/ADC_TIMER_COUNT)
    #define ADC_BUFFER_SAMPLES ((uint32_t) (ADC_FREQUENCY * ADC_AC_CHANNELS * 0.25)) // 0.25s is required

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