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wake-up source/s from lowest possible power down mode

Smart.Enrg

Hi,

I am trying learn about IO/ events that can wake-up nRF52833 from lowest power mode.

What qualifies as event that can serve as wake-up source?

Is it possible to wake-up (from standby) with RF activity? i.e. by enabling RF receive for 
a very short time, in which - detection of a certain short packet/ preamble or I/Q pattern 
can act as trigger/ event resulting wake-up.

Please advise.

Parents
  • 0

    Hi Ash

    The main two power modes in the nRF52 series are called system OFF, and system ON idle.

    For an overview of these two modes, and what wakeup sources are available, please have a look at this chapter from the datasheet.

    There is no automatic 'wake on RF' type feature in the nRF52 devices, but it is possible to run an RTC timer in the background in system ON idle sleep, and use it to power up the radio briefly at a pre-determined interval to look for something like an address match. As long as you make the wakeup interval sufficiently long, and the wakeup period sufficiently short, you can achieve very low average current in this scenario. 

    The PPI controller allows you to connect the compare event of the RTC with the startup task of the radio, which means you can have this system running with minimal software interaction needed until a valid address match occurs (this will trigger a separate event which can be connected to an interrupt and used to alert the application). 

    This will not work in system OFF sleep mode unfortunately, as you are not able to run any timers or other peripherals in this mode. 

    Best regards
    Torbjørn 

Reply
  • 0

    Hi Ash

    The main two power modes in the nRF52 series are called system OFF, and system ON idle.

    For an overview of these two modes, and what wakeup sources are available, please have a look at this chapter from the datasheet.

    There is no automatic 'wake on RF' type feature in the nRF52 devices, but it is possible to run an RTC timer in the background in system ON idle sleep, and use it to power up the radio briefly at a pre-determined interval to look for something like an address match. As long as you make the wakeup interval sufficiently long, and the wakeup period sufficiently short, you can achieve very low average current in this scenario. 

    The PPI controller allows you to connect the compare event of the RTC with the startup task of the radio, which means you can have this system running with minimal software interaction needed until a valid address match occurs (this will trigger a separate event which can be connected to an interrupt and used to alert the application). 

    This will not work in system OFF sleep mode unfortunately, as you are not able to run any timers or other peripherals in this mode. 

    Best regards
    Torbjørn 

Children
  • 0 in reply to ovrebekk

    Thanks Torbjørn,

    ovrebekk said:
    This will not work in system OFF sleep mode unfortunately, as you are not able to run any timers or other peripherals in this mode. 

    If I were to use an external nano power (35nA) system timer to tickle one of the qualified System OFF mode wake up sources (e.g. GPIO/ LCCOMP, or Reset) - that should work right? If so, curious though, in that case - how long would it take from assertion of wakeup signal, to getting radio ready in receive mode? I use nRF52's DCDC configuration - would that impact/ (DCDC settling time) delay startup time? If so, by how much?

    Please advise. Thanks again.

    Best,
    Ash

  • 0 in reply to Smart.Enrg

    Hi Ash

    The main wakeup delay in this case will be the external 32MHz crystal, which is required for the radio to work properly. The startup time of these crystals vary from model to model, but are typically around 400-500us. 

    The wakeup time of the CPU system itself is below 20us. 

    Smart.Enrg said:
    I use nRF52's DCDC configuration - would that impact/ (DCDC settling time) delay startup time? If so, by how much?

    When waking up from system OFF the DCDC will be disabled by default, and you have to enable it explicitly in the code once the CPU starts running. 

    In other words the use of DCDC will not affect startup time. 

    Best regards
    Torbjørn

  • 0 in reply to ovrebekk

    Hi Torbjørn,

    Couple of follow-up questions, going back to my original quest toward optimizing power consumption/ battery life...

    Product spec for nRF52833 v1.3 says: 
    under Flexible power management
    • 1.7 V to 5.5 V supply voltage range
    • On-chip DC/DC and LDO regulators with automated low current modes
    • Automated peripheral power management
    • Fast wake-up using 64 MHz internal oscillator
    • 0.6 µA at 3 V in System OFF mode, no RAM retention
    • 1.5 µA at 3 V in System ON mode, no RAM retention, wake on RTC

    If I were to use 1.8V (vs 3V) supply voltage, along with DCDC configuration. What would be the impact on current-
    consumption (if you could please fill-in the numbers) in following scenarios: 

    1. System OFF mode, no RAM retention?
    2. System ON (no RAM retention, wake on RTC) in each of its sub-power modes:
      Constant Latency? and,
      Low-power?

    Please recommend/ specify (in addition to 1.8V supply voltage), if the there are additional settings that could yield
    in lower power consumption (in either of the System ON sub-power modes)? Such as - with internal/ external LP-
    oscillator settings etc. perhaps.

    Also curious to learn - if nRF52's DCDC configuration help (or not so much) with 1.8V supply input, and its impact 
    on RF performance?

    Please advise. Thanks for your timely attention and help.

  • +1 in reply to Smart.Enrg

    Hi Ash

    In the lowest power states, such as System OFF and System ON with RTC, the system disables the DCDC and uses a linear ultra low power regulator instead. 

    As such there is no difference in current consumption regardless of supply voltage. 

    Smart.Enrg said:
    Please recommend/ specify (in addition to 1.8V supply voltage), if the there are additional settings that could yield
    in lower power consumption (in either of the System ON sub-power modes)? Such as - with internal/ external LP-
    oscillator settings etc. perhaps.

    Using external 32kHz clock usually provides lower sleep and active currents. As shown here and here the run current of the crystal is typically lower than the internal RC oscillator, and if you need to run Bluetooth or other synchronized protocols the RC oscillator requires repeated calibration which also adds to the power budget. 

    Then there is general advice such as making sure all GPIO pins are configured to avoid unwanted current draw in and out of them.

    In the end I would recommend doing some measurements when running your code to make sure that the hardware and software is all configured properly. 

    Smart.Enrg said:
    Also curious to learn - if nRF52's DCDC configuration help (or not so much) with 1.8V supply input, and its impact 
    on RF performance?

     In the nRF52 series the internal voltages are quite a bit lower than 1.8V, and as such there is still some gain when using DCDC at 1.8V. 

    If you play around with the numbers using the Online Power Profiler you can see that you can reduce the average current by around 10-15% when using DCDC at 1.8V. 

    Normally the impact of using DCDC on radio performance is negligible, but there are some exceptions: 

    - Depending on where the DCDC inductors are placed on your board you can see reduced performance at channels 32 and 64. 

    - The CSP version of the nRF52832 is affected by Errata 91, reducing sensitivity when using the DCDC. 

    Best regards
    Torbjørn

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