Hi,
For ratio-metric sensor measurement I need to do either of the following with nRF52833 SAADC module:
Either way the idea is to achieve ratio-metric measurement across sensor conditioning and SAADC for best long term accuracy, linearity.
Please advise. Thanks.
Hi Ash
I don't think there is any way to expose the internal reference on a pin, or use an external signal as reference, but I will double check this with the hardware team to be sure.
Would it not be an option to sample the excitation voltage on a separate ADC input, and use this measurement to calibrate the sensor reading?
In this way it should be possible to emulate an external reference voltage, even if you are using one of the internal reference sources (as long as the internal reference doesn't change between samplings).
Best regards
Torbjørn
Thanks Torbjørn,
Would it not be an option to sample the excitation voltage on a separate ADC input, and use this measurement to calibrate the sensor reading?
In this way it should be possible to emulate an external reference voltage, even if you are using one of the internal reference sources (as long as the internal reference doesn't change between samplings).
That's exactly what I have in my current design. That's additional cost of external reference chip (which for a good stable reference could be as high as 1/5 of nRF52 SoC) on top of that there's (battery time) cost in running extra ADC sampling cycles. That's why looking for a creative, lower cost alternative, without compromising on performance.
Looking forward to comments from Nordic hardware team.
Best,
Ash
Not sure why there is an issue; for ratiometric measurement use VDD/4 as the reference and a VDD-derived excitation voltage (the latter not derived from a regulator). The trick is to avoid any difference in smoothing. For example, it's fine to stuff large reservoir capacitance directly on VDD, affecting both sensor and reference, but then there must be no additional smoothing on the sensor. A change in VDD leads to a change in VDD/4 and the same change in excitation voltage provided it is raw signal. This will only work on (say) bridge type of sensor, and not a sensor which additionally has an internal regulator. If the sensor does have an internal regulator, then apart from using that regulator voltage as the nRF52 VDD there is no alternative to using a second ADC input.
For resistive sensors this works well, and it's important to keep VDD-coupled low frequency noise and not try to suppress that. The SAADC sample time and sample instant can be used to provide rejection of synchronous signals, such as 50/60Hz.
Not sure why there is an issue; for ratiometric measurement use VDD/4 as the reference and a VDD-derived excitation voltage (the latter not derived from a regulator). The trick is to avoid any difference in smoothing. For example, it's fine to stuff large reservoir capacitance directly on VDD, affecting both sensor and reference, but then there must be no additional smoothing on the sensor. A change in VDD leads to a change in VDD/4 and the same change in excitation voltage provided it is raw signal. This will only work on (say) bridge type of sensor, and not a sensor which additionally has an internal regulator. If the sensor does have an internal regulator, then apart from using that regulator voltage as the nRF52 VDD there is no alternative to using a second ADC input.
For resistive sensors this works well, and it's important to keep VDD-coupled low frequency noise and not try to suppress that. The SAADC sample time and sample instant can be used to provide rejection of synchronous signals, such as 50/60Hz.
Thanks hmolesworth,
Though as the mechanism for accessing external reference is available for VComp I was/ am hoping for the same for ADC - your suggestion makes sense, given the limitations in its application as you outlined.
I'm looking for specs (accuracy, stability etc.) on internal reference - can't seem to find that in nRF52833 Product Spec v1.3. Can anyone point me to, or share those numbers please?
Best,
Ash
Hi Ash
Regarding specs on the internal bandgap reference I have forwarded your request internally, and will try to get back to you in a couple of days.
Best regards
Torbjørn
Hi again
The reason the bandgap reference is not separately documented is that this is covered by the gain error specification.
Essentially any inaccuracy in the reference will lead to gain error, which is documented separately for various gain settings (and is in the order of +/- 3%).
Best regards
Torbjørn
Hi,
I have a quick follow-up question - in case of aQFN-73 BGA package there are 5 different VDD pins/ pads.
Is/ are any particular VDD pad/s associated with Analog supply, that'll be used as VDD/4 reference input? Or are all of them tied together in one common VDD rail?
Hi Ash
All of the VDD pins are connected internally, so there is not a single one that is connected to the ADC reference input.
Best regards
Torbjørn
