Testing 48MHz QSPI and switching modes on QSPI chip requiring 2 clock rates in zephyr (nRF connect SDK)

[jm_laird]

We are using an MX25R6435FZNIL0 part on a design with a nRF5340 module and wish to test that 48MHz operation of QSPI is working, we are using the latest master version of the nRF connect SDK. However, it seems that the part we, despite supporting 80MHz clock speeds, has 2 mode - ultra low power mode and high performance mode, this is configured with a volatile bit which resets on power up to the state of ultra low power mode, before that is enabled, we can clock the QSPI memory at 8MHz, somehow we need to initialise the zephyr application to open QSPI at 8MHz mode, set the QSPI chip configuration (setting quad enable at the same time optionally) to high performance mode, then have the QSPI driver opened at the real speed of 48MHz, and we might also need to add in some dummy clock cycle support - how do we go about doing this? It doesn't seem like Zephyr RTOS is designed around being able to cater for such a scenario.

[Håkon Alseth]

Hi,

 

The qspi module in zephyr sets the ifconfig1 once on init:

https://github.com/nrfconnect/sdk-zephyr/blob/master/drivers/flash/nrf_qspi_nor.c#L368

 

And there doesn't look like there's any API for dynamically changing this. You could run uninit (https://github.com/NordicSemiconductor/nrfx/blob/master/drivers/src/nrfx_qspi.c#L324) and init the module again with a new clock freq.

 

and we might also need to add in some dummy clock cycle support - how do we go about doing this? It doesn't seem like Zephyr RTOS is designed around being able to cater for such a scenario.

 You can set the clock delay in IFCONFIG1 register: https://infocenter.nordicsemi.com/topic/ps_nrf5340/qspi.html?cp=3_0_0_6_24_10_49#register.IFCONFIG1

Have you looked at the QSPI hardware interface description and checked if this is sufficient towards the mode you're hoping to use? dummy data is being sent in some specific read modes:

https://infocenter.nordicsemi.com/topic/ps_nrf5340/qspi.html?cp=3_0_0_6_24_9#interface_description

 

Kind regards,

Håkon