SPIM doesn't transmit after a few transfers

[SmallerPond]

Using SDK 17.0.2 and the nRF52840DK, I am setting up SPIM with a memory IC (not actually hooked up though, just looking at the signals on the oscilloscope).  This code is executed before anything else (except the spi init), so nothing else is running.  I have to send a write enable (one byte 0x06) then I am writing to two different sectors, so two writes.  I am doing this in blocking mode because these values must be written to memory and validated before the application can begin.  The first to transactions, i.e. write enable and the first write, work perfectly, - I see the CS, SCK, and MOSI signals on the scope.  The second write, I get nothing on any of the CS, SCK, or MOSI lines on the scope.  I see nothing different between the setups, and I've changed the pins but see the same behavior.  Any idea what could cause this?  Should I be clearing something that I'm not?  Again, the lines are not hooked up to anything but the scope.  Here's my example code:

uint8_t tx_buff[20];
uint8_t m_array1[] = {0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f};
uint8_t m_array1[] = {0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f};
const nrfx_spim_t m_spim3 = NRFX_SPIM_INSTANCE(3);
nrfx_spim_config_t spim_cfg = NRFX_SPIM_DEFAULT_CONFIG;

spim_cfg.frequency  = NRF_SPIM_FREQ_125K;
spim_cfg.ss_pin     = NRF_GPIO_PIN_MAP(0, 15);
spim_cfg.sck_pin    = NRF_GPIO_PIN_MAP(0, 10);
spim_cfg.mosi_pin   = NRF_GPIO_PIN_MAP(0, 24);
spim_cfg.miso_pin   = NRF_GPIO_PIN_MAP(0, 25);
spim_cfg.mode       = NRF_SPIM_MODE_0;
spim_cfg.use_hw_ss  = true;
APP_ERROR_CHECK(nrfx_spim_init(&m_spim3, &spim_cfg, spim_event_handler, NULL));

tx_buff[0] = 0x06; // Write enable

desc.p_tx_buffer  = tx_buff;
desc.tx_length    = 1;
desc.p_rx_buffer  = NULL;
desc.rx_length    = 0;

while (nrfx_spim_xfer(&m_spim3, &desc, NRFX_SPIM_FLAG_NO_XFER_EVT_HANDLER) == NRFX_ERROR_BUSY);
while (nrfx_spim_end_event_get(&m_spim3) != (uint32_t)m_spim3.p_reg + NRF_SPIM_EVENT_END);

tx_buff[0] = 0x02; // Write Page
tx_buff[1] = 0x00;
tx_buff[2] = 0x10; // Sector 1 address (sectors align as 0x00S0000)
tx_buff[3] = 0x00;

memcpy(tx_buff + 4, m_array1, sizeof(m_array1));

desc.p_tx_buffer  = tx_buff;
desc.tx_length    = 20;
desc.p_rx_buffer  = NULL;
desc.rx_length    = 0;

while (nrfx_spim_xfer(&m_spim3, &desc, NRFX_SPIM_FLAG_NO_XFER_EVT_HANDLER) == NRFX_ERROR_BUSY);
while (nrfx_spim_end_event_get(&m_spim3) != (uint32_t)m_spim3.p_reg + NRF_SPIM_EVENT_END);

tx_buff[0] = 0x02; // Write page
tx_buff[1] = 0x00;
tx_buff[2] = 0x20; // Sector 2 address
tx_buff[3] = 0x00;

memcpy(tx_buff + 4, m_array2, sizeof(m_array2));

desc.p_tx_buffer  = tx_buff;
desc.tx_length    = 20;
desc.p_rx_buffer  = NULL;
desc.rx_length    = 0;

while (nrfx_spim_xfer(&m_spim3, &desc, NRFX_SPIM_FLAG_NO_XFER_EVT_HANDLER) == NRFX_ERROR_BUSY);
while (nrfx_spim_end_event_get(&m_spim3) != (uint32_t)m_spim3.p_reg + NRF_SPIM_EVENT_END);

[sebre]

If you want blocking behaviour, pass a NULL event handler at driver init and don't call nrfx_spim_xfer in a loop. The NRFX_SPIM_FLAG_NO_XFER_EVT_HANDLER flag does not set a transfer to blocking.

See description of nrfx_spim_init and nrfx_spim_xfer in nrfx_spim.h

[SmallerPond]

Hmmm, good to know, thanks.  I am also misusing the nrfx_spim_end_event_get function (not sure what I was thinking that should be).  As it turned out, I needed a Write Enable command before every write - once I added this and changed to blocking the right way, everything works.  Thanks!