RAM retention after a pin reset

[buddi_nordic]

I have a design using nRF52832, and I'm hoping to use RAM set before a pin reset is applied. But, at least with a debugger attached, RAM appears to be randomised through a reset.

This is with the S132 softdevice present. I can keep noinit through a soft reset, not a pin reset.

I've tried setting RAM[n].S0RETENTION/S1RETENTION, but those get reset when the pin reset hits.

Does the nRF52832 not keep RAM through a pin reset? Is there some way I can do this?

[Jørgen Holmefjord]

Hi,

RAM is not retained through a pin reset, you can see a table of which peripheral is reset by each reset source on this page.

The SxRETENTION registers are used to turn on/off RAM retention during System OFF mode.

If you need to retain data through a pin reset you need to store it in flash. The FDS library can be used for this.

Best regards,
Jørgen

[Jørgen Holmefjord]

Yes, the table shows which targets are reset by which reset source, so the 'x' mean that the target is reset. 

This means that the RAM is "reset" by a watchdog reset as well. Notice the note on the page: "The RAM is never reset, but depending on reset source, RAM content may be corrupted".

If it is not super critical that the variable is retained through reset, you could set aside a separate no-init section in RAM that is not used by the rest of the application, where you store the variable together with a CRC value that is used to verify the integrity of the data. If this is not an option, you need to store the data in flash.

[buddi_nordic]

I am actually keeping a log (CRCed) in no-init memory. I'm pretty sure (have to look agin) that it survives a watchdog reset without losing the log contents. But a pin reset seems to randomise most memory.

From the looks of it, I COULD keep data in RAM if I use some sophisticated recovery schemes like reed-solomon or something. Not going that way though. Roughly 30% bit-flips on the memory contents.

To keep that log, I'll have to write it flash then.