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Temporarily using P0.21 as gpio then switching back to nRESET without resetting processor - nRF52832

kevin123

Hello,

In our application, we have an external watchdog IC. We need to test the timing of that chip during our board power-on self-test.

We currently achieve this by setting the reset pin to a GPIO input, then intentionally triggering the watchdog IC too slowly and verifying it toggles the nRESET pin (P0.21). Once finished that test, we want to change that pin back to a chip reset so that the external watchdog chip can do its job.

We have CONFIG_GPIO_PINRESET enabled, and then in the POST function, run:

nrf_gpio_cfg(PIN_NRESET, NRF_GPIO_PIN_DIR_INPUT, NRF_GPIO_PIN_INPUT_CONNECT, NRF_GPIO_PIN_PULLUP,   NRF_GPIO_PIN_S0S1, NRF_GPIO_PIN_NOSENSE);
After doing so, how should we set that pin back to its reset function?
Thanks in advance!
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  • +1

    Hi,

    After doing so, how should we set that pin back to its reset function?

    I am not sure this makes sense. You should not even be able to configure the pin as not pin reset assuming it was allready configured as such in the UICR (which will be the case when CONFIG_GPIO_PINRESET was defined when building the project).

    Specifically, pin reset is enabled by writing to the two PSELRESET registers in UICR, which is persistent. (This is done for you when you have CONFIG_GPIO_PINRESET defined) This takes effect after the next reset, and from that point the pin will act as a reset pin unless the UICR is erased or another value is written to PSELRESET.

    You cannot disable pin reset by configuring the pin as another functionality. The only way to disable pin reset after it has been enabled is to erase the UICR (typically by a full chip erase), or to write another value (toggle more bits from '0' to '1'). If the latter is done, you need to erase the UICR in order to be able to write 21 to the PSELRESET registers in order to re-enable pin reset after the next reset.

    For most applications (at least those using a bootloader) erasing the UICR in itself is a dangerous operation, so it does not immediately seem like a good idea to do this as part of a self-test.

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  • +1

    Hi,

    After doing so, how should we set that pin back to its reset function?

    I am not sure this makes sense. You should not even be able to configure the pin as not pin reset assuming it was allready configured as such in the UICR (which will be the case when CONFIG_GPIO_PINRESET was defined when building the project).

    Specifically, pin reset is enabled by writing to the two PSELRESET registers in UICR, which is persistent. (This is done for you when you have CONFIG_GPIO_PINRESET defined) This takes effect after the next reset, and from that point the pin will act as a reset pin unless the UICR is erased or another value is written to PSELRESET.

    You cannot disable pin reset by configuring the pin as another functionality. The only way to disable pin reset after it has been enabled is to erase the UICR (typically by a full chip erase), or to write another value (toggle more bits from '0' to '1'). If the latter is done, you need to erase the UICR in order to be able to write 21 to the PSELRESET registers in order to re-enable pin reset after the next reset.

    For most applications (at least those using a bootloader) erasing the UICR in itself is a dangerous operation, so it does not immediately seem like a good idea to do this as part of a self-test.

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