I'm attempting to connect an SDcard (micro SD) to an nRF52840-DK via a breadboard setup. I'm running Zephyr and it appears that configuration is to be performed via device-tree. I'm following one of the examples in the samples/subsys/fs/fat_fs directory. I created a .overlay file with the following entry:
&spi2 {
status = "okay";
sck-pin = <33>; /* Port1, Pin1 */
mosi-pin = <34>; /* Port1, Pin2 */
miso-pin = <35>; /* Port1, Pin3 */
cs-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; /* Port1 Pin4 */
sdhc0: sdhc@0 {
compatible = "zephyr,mmc-spi-slot";
reg = <0>;
status = "okay";
label = "SDHC0";
spi-max-frequency = <24000000>;
};
};
Using a logic analyzer, I can see the SCK and MOSI pins change as expected, but the CS pin is stuck HIGH.
Setting a breakpoint in initialization shows that the SPI SS pin has a value of 0xff (meaning it is unassigned).
Searching further, it appears that the .ss_pin is hard-coded to "NOT_USED" in spi_nrfx_spi.c (line 378). I'm not sure how the .ss (chip-select) pin is to be assigned in the Zephyr device-tree environment given this. (I know how to set these pins up if configuring the SPI manually, but I got the impression that it is recommended that Zephyr use device-tree (.dts and .overlay files).
Thanks!
Edit: I got a response on Zephyr/Slack that verified that the .overlay entry is correct.
However, it still doesn't work. Tracing execution, I found that the existence of a CS GPIO is checked at line 842 of disk_access_spi_sdhc.c Stepping through this code, it looks like data->cs.gpio_dev is assigned 0x0 at line 843. The other entries of the cs structure appear to be correct. Looking at zephyr.dts (in the build directory), it looks like @gpio0 and @gpio1 are both defined.
I need to understand why "device_get_binding(DT_SPI_DEV_CS_GPIOS_LABEL(SPI_SDHC_NODE))" is not returning a valid value. But I can't find the definition of the macro DT_SPI_DEV_CS_GPIOS_LABEL...
Thanks...