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Setting UICR in nRF52810 and S112

Please tell me the UICR setting in nRF52810 and S112.
Currently, when I develop with nRF52810 and S112, the area of UICR is 0xFF.

[1]The oscillator is equipped with 32MHz, but the UICR setting is 16MHz.
 The oscillator setting is 32MHz, but the UICR setting is 16MHz. The oscillator setting is different from the board setting, but the program still works. Why is this?

[2]I want to set the UICR setting to the following, is there any way to set it?
 I'm using SEGGER as my development environment.
 CLENR0 : 0x19000
 XTALFREQ : 0x00

  • Hello,

    I am not sure we have the same understanding of what UICR is.

     

    The oscillator is equipped with 32MHz, but the UICR setting is 16MHz.

     What do you mean by this? Where in the UICR is something set to 16MHz?

     

    I want to set the UICR setting to the following, is there any way to set it?

     I am not sure what you mean here either.

    Do you want to store some custom data in the UICR that you later want to use in your application? Because the UICR has nothing to do with XTAL frequencies by default.

    Best regards,

    Edvin

  • I may be wrong in my understanding.
    Since nRF51 had the following settings, I thought that nRF52 should have the same settings.
    Is there any setting for nRF52 that is equivalent to nRF51?

    nRF51 Reference Manual v3.0.1
    infocenter.nordicsemi.com/.../nRF51_RM_v3.0.1.pdf

    UICR : 0x10001000
    *CLENR0                      : 0x000 : Length of code region 0
    *RBPCONF                   : 0x004 : Read back protection configuration
    *XTALFREQ                   : 0x008 : Reset value for XTALFREQ in CLOCK, see CLOCK chapter
    *FWID                             : 0x010 : Firmware ID
    *BOOTLOADERADDR : 0x014 : Bootloader address

    ⇒This time, I checked the above address on nRF52 and asked a question.

  • The UICR is a bit different on the nRF52 and the nRF51, yes. And it differs a bit between the different nRF52 chips as well. For the nRF52810 the UICR registers are found here:

    https://infocenter.nordicsemi.com/topic/ps_nrf52810/uicr.html?cp=4_5_0_3_4_0#topic

    So the first registers are not used.

    The first register that is used is the 0x014: NRFFW[0] (same as BOOTLOADERADDR).

    In the nRF51 you could choose between a 16 and 32MHz HFXTAL. On the nRF52 series, this is no longer an option, which is probably why these were removed. The RBPCONF is the same as the register 0x208: APPROTECT. As it is not the same physical readback protection as on the nRF51, I assume this is the reason they have changed the register.

    And I don't think the CLENR0 is used anymore. At least as far as I know there is no register holding the length of the application.

    Best regards,

    Edvin

  • I have a question about CLENR0.

    The following document states that "Code running from code region 1 will not be able to write to code region 0."
    <infocenter.nordicsemi.com/.../nRF51_RM_v3.0.1.pdf
    8 User Information Configuration Registers (UICR)
    8.1 Functional description

    In nRF52, there is no CLENR0. Is there any function to guard the soft device placed in code region 0?

  • komuro said:
    Is there any function to guard the soft device placed in code region 0?

     What exactly do you mean? 

    The softdevice protects itself. The application can't overwrite the softdevice.

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