Fstorage Address Range

[Omri Friedman]

Using SD S140 7.2.0 SDK 17 (nRF52840).

I cannot write to internal flash addresses above 0x78000.

I am calling nrf_fstorage_init setting start_addr=0x68000 and end_addr=0xF0FFF.

When using nrf_fstorage_write to for addresses above 0x78000 all seems to go well but no data is actually written (no hard fault or ASSERT or bad return value).

0x78000 seems to be the DFU start address on the x32 MCU. But we DO use x40 settings with S140 and setting proper address range on the ICF file (using IAR).

Any ideas?

BTW - when writing directly using the flash registers (NRF_NVMC->CONFIG) i DO manage to write to this memory space.

This is the ICF (linker) file:

define symbol __ICFEDIT_region_SD_start__ = 0x00000;
define symbol __ICFEDIT_region_SD_end__ = 0x26FFF;
define symbol __ICFEDIT_region_ROM_start__ = 0x27000;
define symbol __ICFEDIT_region_ROM_end__ = 0x67FFF;
define symbol __ICFEDIT_region_DROM_start__ = 0x68000;
define symbol __ICFEDIT_region_DROM_end__ = 0xF0FFF;
define symbol __ICFEDIT_region_DFU_start__ = 0xF1000;
define symbol __ICFEDIT_region_DFU_end__ = 0xFdfff;
define symbol __ICFEDIT_region_DDFU_start__ = 0xFF000;
define symbol __ICFEDIT_region_DDFU_end__ = 0xFFFFF;

[Sigurd]

Hi,

If we use e.g. the ble_app_buttonless_dfu example in the SDK as an example, the pca10056/S140 linker file looks like this:

/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x27000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__   = 0x27000;
define symbol __ICFEDIT_region_ROM_end__     = 0xeffff;
define symbol __ICFEDIT_region_RAM_start__   = 0x20002270;
define symbol __ICFEDIT_region_RAM_end__     = 0x2003ffff;
export symbol __ICFEDIT_region_RAM_start__;
export symbol __ICFEDIT_region_RAM_end__;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__   = 8192;
define symbol __ICFEDIT_size_heap__     = 8192;
/**** End of ICF editor section. ###ICF###*/

define memory mem with size = 4G;
define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];

define symbol __region_uicr_bootloader_start_address_start = 0x10001014;
define symbol __region_uicr_bootloader_start_address_length = 0x4;
define symbol __start_uicr_bootloader_start_address = __region_uicr_bootloader_start_address_start;
define symbol __stop_uicr_bootloader_start_address = __region_uicr_bootloader_start_address_start + __region_uicr_bootloader_start_address_length;
export symbol __start_uicr_bootloader_start_address;
export symbol __stop_uicr_bootloader_start_address;

define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
define block RO_END    with alignment = 8, size = 0     { };

initialize by copy { readwrite };
do not initialize  { section .noinit };

keep { section .intvec };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region   { readonly,
                        block RO_END };
place in RAM_region   { readwrite,
                        block CSTACK,
                        block HEAP };

If we then look at the bootloader examples, examples/secure_bootloader, we see that 0x78000 is the start address for the pca10040/S132 project. But the pca10056/s140 project the start address is 0xF8000. So I would recommend that you double check that you are using the correct bootloader project(pca10056/S140).

[Omri Friedman]

We are using pca10056/s140 bootloader and we also see that the bootloader image is programmed to the correct location at the end of the 1M flash.

The DFU is also working fine. 

We manage to upgrade firmware over the air on our nRF52840 MCU using the x40 DFU.

But still - when the firmware attempts to write to addresses above 0x78000 via nrf_fstorage nothing is written (unless we bypass the nrf_fstorage and use direct registers access).

BTW - in the example linker file you provided there is a problem with the boot loader address. it should be 0xF10000 and not 0xF80000 (at least in this version of SDK - 7.0.2). 

[Sigurd]

Omri Friedman said:

it should be 0xF10000 and not 0xF80000

 I see that the debug variant of the BLE bootloader uses 0xF10000, the non-debug variant uses 0xF8000.

Also note that if you use the Peer Manger, then it uses 3 flash pages of storage(FDS_VIRTUAL_PAGES), located below the bootloader to store bond information.

Omri Friedman said:

when the firmware attempts to write to addresses above 0x78000 via nrf_fstorage nothing is written

I am calling nrf_fstorage_init setting start_addr=0x68000 and end_addr=0xF0FFF.

Try to set end_addr to e.g. 0x79000, and see if that works

[zive]

The non-debug variant does not work at 0xF8000.
It does work if relocated to 0xF1000.

[Sigurd]

If you have done changes to the bootloader code, or configuration, it might require more space, so that you need to relocate it.