nRF5340 Shared Peripherals between APP and NET cores

[anthony32086]

Hello,

The product specification for the nRF5340 peripheral chapter here mentions "The application core peripherals are accessible from the network core".

However in the device tree for the CPU there is only one memory mapped node for i2c0,spi0,uart0. 

does this mean if nodes are added and zephyr is properly configured, the network CPU can access the APP CPU peripherals such as QSPI or I2C_3 for example.

[Carl Richard]

Hi again, Anthony!

I got back from the developers you indeed can access any peripheral on the app core from the network core. This currently isn't documented or implemented in the MDK or the SDK, but the peripherals can be interacted with using the registers directly. In addition I got a tip on how you can grant the network core access to the GPIOs of the app core. See below:

When building any sample from NCS, the application core goes through the file listed below, setting up permissions for the network domain before taking the network domain out of reset. The UART pins permission for the network domain are also set in this file.

NCS\zephyr\boards\arm\nrf5340_dk_nrf5340\nrf5340_cpunet_reset.c

In order to enable the network domain to have control of one or more of the status LEDs on the DK add one or more of the following lines to the mentioned file, inside the remoteproc_mgr_config() function.

/* Add LEDs to Network domain control */
NRF_P0->PIN_CNF[DT_ALIAS_LED0_GPIOS_PIN] =
GPIO_PIN_CNF_MCUSEL_NetworkMCU << GPIO_PIN_CNF_MCUSEL_Pos;
NRF_P0->PIN_CNF[DT_ALIAS_LED1_GPIOS_PIN] =
GPIO_PIN_CNF_MCUSEL_NetworkMCU << GPIO_PIN_CNF_MCUSEL_Pos;
NRF_P0->PIN_CNF[DT_ALIAS_LED2_GPIOS_PIN] =
GPIO_PIN_CNF_MCUSEL_NetworkMCU << GPIO_PIN_CNF_MCUSEL_Pos;
NRF_P0->PIN_CNF[DT_ALIAS_LED3_GPIOS_PIN] =
GPIO_PIN_CNF_MCUSEL_NetworkMCU << GPIO_PIN_CNF_MCUSEL_Pos;

Hope this gave some clarity.

Best regards,
Carl Richard