nRF53 SPI speed

[nsga333]

The nRF53 data sheet defines the minimum clock period for teh SPI slave and master as 125nSec - which equates to 8MHz. The SPI Slave also gives the max data rate as 8MHz with some caveats about the device at the other end.

The SPI Master however gives the max data rate as 16MHz or 32MHz depending on teh SPI in use despite specifying a 8MHz clock (Based upon 125nSec minimum period).

Could you clarify the behaviour of these peripherals please as it doesn't make sense to me

[Simonr]

Hi

As stated in the SPIM section of the PS, the application core's SPIM4 instance supports up to 32Mbps write speed when running at 128MHz. While the other instances support up to 8MHz.

Best regards,

Simon

[nsga333]

Thanks Simon,

I have a few questions:

So the 16MHz quoted in the data sheet for SPIM is incorrect I assume?

The minimum clock period I pressume is only correct for SPI 1- SPI 3  ( There is no foot note on this to indicate this)

Will SPIS also run at 32MHz on SPI4?

Thnaks

Nigel.

[Simonr]

Hi Nigel

I've discussed this with my colleagues, and there are some issues with the electrical specification of the SPIM peripheral for the nRF53 indeed. The register section is correctly describing each instance though, and should be used as of now. I have created an internal ticket to update the SPIM chapter in the PS, and we are currently reviewing it to get a fix out.

The 16MHz is only relevant for SPIM4, which is able to run at up to 32MHz (write speed), while the SPIM0-3 instances only support up to 8MHz. The minimum clock period is indeed only correct for SPIM0-3.

SPIS will not be able to run at 32MHz, as the SPIS only have the following instances: SPIS0-3 on the application core and SPIS0 on the network core.

Best regards,

Simon