[NRF5340] Can TWIM (I2C) Pin drive strength be changes to H0D1?

[SyedSajid]

Based on the datasheet table 166 can the drive strength for SCL/SDA pin is mentioned to be selected as S0D1 can it be changed to H0D1 drive strength?
Since based on the IBIS model simulation of NRF5340, the S0 output impedance is very high (500R@3V3 and 949R@1V8). This impacts the min pullup resistor value and max I2C capacitance. The output impedance dictates that min pullup needs be >~5000R@3V3 and >~9500R@1V8 for the S0 driver.
This may be too high a pullup resistor for I2C capacitance, or EMI. In which case then H0D1 will need to be used.

[Amanda Hsieh]

Hi Syed, 

H0D1 is a legal setting for the GPIO, and can be used for TWI.

But also, if you look at footnote 27 at the bottom of the page, it points to the Pin assignments chapter. Following that link gives some special instructions on how to activate the strongest TWI driver, using the E0E1 setting of these dedicated pins. Note that only the two dedicated P1.02/P1.03 high-speed TWI pins have the special E0E1 setting, which despites its admittedly misleading name is in fact an open-drain E0D1 setting.

-Amanda H.