nRF52840 Power Configuration

[eiadj]

Hi,

We are designing the Nordic 52840 into a product and had some questions about the power configuration:

1.  For both REG0 and REG1, are there any downsides to selecting the LDO besides increased current consumption? Similarly, are there any downsides (potentially RF or noise related?) to going with the DCDC besides the additional components?
2. On our design, we would either power the chip directly from Vbus from USB, or with an external regulator. We are leaning towards using the external regulator - is there any potential downside with this approach vs. using REG0 and powering the chip through Vbus?

Also, on a separate topic, for the GPIOs marked "low speed, standard drive only", does this affect the amount of current we would be able to sink vs a "high drive" GPIO? Also, what are the consequences for violating the guidelines on those pins?

Thanks!

Eiad Jandali 

[eiadj]

one more question on power:

If the DCDC option is used on REG0/REG1, does the Nordic do any sort of switching between and the LDO automatically to optimize power or RF performance?

[Simonr]

Hi

1. No, there should be no other implications than the current consumption increasing if you use the LDO. 

2. There shouldn't be any downsides to using an external regulator except the production cost increasing with the extra required components. 

3. GPIOs marked as "Standard drive/low speed" are generally located close to the radio, and if run at high drive/frequencies while the radio is running, that might cause performance issues and interference for the radio. As long as the GPIO is set as standard and the frequency is below 10kHz, there is no limit to the amount of current you can sink to a GPIO.

Bonus question: Yes, the nRF5x series all do switching between the LDO and DCDC to optimize power.

Best regards,

Simon

[eiadj]

Thanks!

Regarding respond #3, is it only a risk if the GPIO is "high drive" AND >10kHz, or just one of them?

And for high-drive, the only risk is current sourcing? It seems odd that there would be no limit on sinking current, even for normal GPIOs. 

[eiadj]

also, is there any data comparing the efficiency trade-off of the LDO vs the DCDC at different operating points?

[Simonr]

Hi

3. This is a risk if one of these GPIOs are either High driver OR >10kHz.

According to our GPIO electrical specification, the maximum current at VSS + 0.4V standard drive is 4mA, but there are no limits specific for these standard drive low freq. GPIOs close to the radio.

What we have on the LDO/DCDC is stated in the Product spec. Power Supply chapter.

Best regards,

Simon