SPI communication rising edge of clock

[Milad]

Hello,

How can I have the rising edge of my clock to be less than 40nm? I am currently using a 4GHZ clock cycle for my SPI communication? Thank you.

[Wojtek]

I don't know what is the time of edge rising, but according to reference manual SPI Master on nrf51822 allows max data rate of 8Mbps

[RK]

Your question really doesn't make any sense at all.

40nm? 40 nanometers? Did you mean 40ns? Even if you did, 40ns is the total cycle time for 25MHz which is somewhat less than 4GHz, a frequency 500 times beyond what the nrf51 series supports for SPI. In fact the actual product sheet for the 51822 says 4MHz is the max.

That product sheet also gives the clock rise/fall time as 100ns, so you can't have 40ns, even if that's what you meant.