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NRF5340 power consumption issue when QSPI is disabled.

Hi

        I am having some issues with running QSPI on the nRF5340DK board.
After I disabled the QSPI, I found the board still having a high current consumption of 700 uA.

Although I tried trying edit source code follow the nrf52840_errata [122] docs which had a similar problem. But I still can't fix the problem.

static int qspi_nor_read(const struct device *dev, off_t addr, void *dest,
			 size_t size)
{
	if (!dest) {
		return -EINVAL;
	}

	/* read size must be non-zero */
	if (!size) {
		return 0;
	}

	const struct qspi_nor_config *params = dev->config;

	/* affected region should be within device */
	if (addr < 0 ||
	    (addr + size) > params->size) {
		LOG_ERR("read error: address or size "
			"exceeds expected values."
			"Addr: 0x%lx size %zu", (long)addr, size);
		return -EINVAL;
	}

	int rc = ANOMALY_122_INIT(dev);

	if (rc != 0) {
		goto out;
	}

	qspi_lock(dev);

	nrfx_err_t res = read_non_aligned(dev, addr, dest, size);

	qspi_unlock(dev);

	rc = qspi_get_zephyr_ret_code(res);

out:
	ANOMALY_122_UNINIT(dev);
	return rc;
}

static void anomaly_122_uninit(const struct device *dev)
{
	struct qspi_nor_data *dev_data = get_dev_data(dev);
	bool last = true;

	qspi_lock(dev);

#ifdef CONFIG_MULTITHREADING
	/* The last thread to finish using the driver uninit the QSPI */
	(void) k_sem_take(&dev_data->count, K_NO_WAIT);
	last = (k_sem_count_get(&dev_data->count) == 0);
#endif

	if (last) {
		while (nrfx_qspi_mem_busy_check() != NRFX_SUCCESS) {
			k_msleep(50);
		}

		nrf_gpio_cfg_output(QSPI_PROP_AT(csn_pins, 0));
		nrf_gpio_pin_set(QSPI_PROP_AT(csn_pins, 0));

		//*(volatile uint32_t *)0x40029010ul = 1ul;
		//*(volatile uint32_t *)0x40029054ul = 1ul;

		nrfx_qspi_uninit();
		qspi_initialized = false;
	}

	qspi_unlock(dev);

	LOG_INF("anomaly_122_uninit");

}

nrf_qspi_nor.rar

Parents
  • Hi,

    At what frequency is the scalable QSPI input clock (PCLK192M) running at? This can be configured in register HFCLK192MCTRL. When running at the full 192MHz speed the device uses more current (with a sleep current of ~700uA).

    To lower the sleep current consumption you would need to configure the QSPI to a lower frequency during sleep. Scaling this down to 96MHz (divide by two) should give much better numbers. Depending on the use-case reducing, the frequency just around CPU sleep should be a viable option. This is described closer under Voltage and Frequency Scaling in the PS.

    Best regards,
    Jørgen

Reply
  • Hi,

    At what frequency is the scalable QSPI input clock (PCLK192M) running at? This can be configured in register HFCLK192MCTRL. When running at the full 192MHz speed the device uses more current (with a sleep current of ~700uA).

    To lower the sleep current consumption you would need to configure the QSPI to a lower frequency during sleep. Scaling this down to 96MHz (divide by two) should give much better numbers. Depending on the use-case reducing, the frequency just around CPU sleep should be a viable option. This is described closer under Voltage and Frequency Scaling in the PS.

    Best regards,
    Jørgen

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