Power consumption and periodic wakeup

[Tamás]

I'm measuring the power consumption of the BLE Beacon example and got the graph below for one beacon transmission. I'm wondering what those smaller peaks are with 1ms period? Does the softdevice wake up for something every 1ms? Is there a way to avoid this?

My code is simply just the following:

int main(void)
{
  power_management_init();
  ble_stack_init();
  advertising_init();

  advertising_start();

  for (;; )
  {
    nrf_pwr_mgmt_run();
  }
}

Thanks for any hints!

[Stian Røed Hafskjold]

Hi, this is probably the regulator operating in burst mode (refresh mode). During idle periods the regulator draws current in bursts to maintain the correct voltage on the internal regulator output (DEC4). So it's not the CPU waking up, it's just how the regulator is designed.

[Tamás]

But it still uses power, doesn't it? Based on the PPK measurements power consumption is around 15 uA instead of around 3 uA. How can I eliminate it? Thank you for your response!

[Stian Røed Hafskjold]

The burst spikes are part of the idle current, but I agree that 15 uA sounds too high.

It could also be caused by noise from the USB cable depending on how you connect things. If you are measuring current through the current measurement header on a nRF52 DK (PCA10040) and leave the USB cable plugged in there will be noise from the USB and the current consumption will go up. Try to supply the board with 3V on the external supply header, using a separate power supply, and pull out the USB cable and see if that helps.

[Tamás]

Good point! After removing the USB conenction and powering the board from a battery I get a different pattern. The 1 kHz noise is gone, so it was probably the USB frame rate. Now I have a 32 Hz pulse frequency, which might be for the regulator as you suggested above. Could you confirm this assumption? The average power consumption seems to be too good to be true, around 1.4 uA.

[Stian Røed Hafskjold]

Yes, this looks more like the regulator. I also see a 30ms refresh interval from the regulator when the chip is in system ON idle mode.

The system ON idle typical current, with full RAM retention, is specified to be at 1.5 uA. Then you will have to add 0.2 uA for the LF clock running from an external crystal, and 0.1 uA for the RTC. So a total of 1.8 uA is the expected current in idle when running the BLE stack. The numbers are typical numbers, and there will be chip to chip variation, so even though 1.4 uA sounds a bit too low, I think it's still within the expected variation.

As long as the current between the regulator spikes is not negative, there is no leakage flowing into the chip from elsewhere, and the measurement should be correct.