Not able to Initialize HIght Speed SPI in nRF Connect SDK v1.5.1

[SanketC]

Hello,

I am using nRF5340DK board and I am trying to enable high-speed SPI pins in nrf5340dk_nrf5340_cpuapp.dts

&spi4 {
compatible = "nordic,nrf-spim";
status = "okay";
sck-pin = <8>;
miso-pin = <9>;
mosi-pin = <10>;
};

And enabled configuration in prj.conf :

CONFIG_SPI=y
CONFIG_SPI_4=y

Also added SPI in nrf5340dk_nrf5340_cpuapp.yaml 

identifier: nrf5340dk_nrf5340_cpuapp
name: NRF5340-DK-NRF5340-application-MCU
type: mcu
arch: arm
toolchain:
- gnuarmemb
- xtools
- zephyr
ram: 64
flash: 256
supported:
- gpio
- i2c
- spi
- pwm
- watchdog
- usb_cdc
- usb_device

Once I flash the board, immediately after power ON, DK board is resetting contineously. By connecting SEGGER IDE, I found following error

[00:00:00.405,059] [0m<inf> cp_central: >>>>>>>>>>> In cp ap main[0m
[00:00:03.889,007] [1;31m<err> os: ***** BUS FAULT *****[0m
[00:00:03.889,007] [1;31m<err> os: Precise data bus error[0m
[00:00:03.889,038] [1;31m<err> os: BFAR Address: 0x0[0m
[00:00:03.889,038] [1;31m<err> os: r0/a1: 0x200012f0 r1/a2: 0x00000000 r2/a3: 0x00000000[0m
[00:00:03.889,038] [1;31m<err> os: r3/a4: 0x00000000 r12/ip: 0x000033e4 r14/lr: 0x00018225[0m
[00:00:03.889,038] [1;31m<err> os: xpsr: 0x69000225[0m
[00:00:03.889,038] [1;31m<err> os: Faulting instruction address (r15/pc): 0x00017d98[0m
[00:00:03.889,068] [1;31m<err> os: >>> ZEPHYR FATAL ERROR 0: CPU exception on CPU 0[0m
[00:00:03.889,068] [1;31m<err> os: Fault during interrupt handling
[0m
[00:00:03.889,068] [1;31m<err> os: Current thread: 0x200013a0 (unknown)[0m
[00:00:04.179,931] [1;31m<err> fatal_error: Resetting system

I need help to configure SPI pins (8- SCK,10-MOSI) and how to use them in firmware. It will be helpful if I get any examples. For now, I want SPI freq @1MHz.

Note: If I use other pins then there is no crash. 

[Håkon Alseth]

Hi,

 

It looks like you have the correct setup for using SPI, but a fault is triggered during runtime.

[00:00:03.889,007] [1;31m<err> os: Precise data bus error[0m
[00:00:03.889,038] [1;31m<err> os: BFAR Address: 0x0[0m

This indicates that you are executing a NULL pointer somewhere.

 

Could you try to look at your .map file, or use arm-none-eabi-addr2line to resolve the faulting addresses to source code lines?

ie.

arm-none-eabi-addr2line -e build-folder/zephyr/zephyr.elf 0x00017d98
arm-none-eabi-addr2line -e build-folder/zephyr/zephyr.elf 0x00018225

 

[00:00:03.889,068] [1;31m<err> os: Current thread: 0x200013a0 (unknown)[0m

This is a RAM mapped address, so you need to figure out which thread this is by manually checking the build-folder/zephyr/zephyr.map file. It might be that you need to adjust the stack size for this specific thread.

 

Kind regards,

Håkon  

[SanketC]

Hi Håkon,

Now another help I needed to drive CS pin fast. 

My SPI4 SCK is at 16Mhz and I am sending 3byte (SPI configured as 8bit word size). In this case, I can observe the delay before and after starting the transmission. I have passed value"0" to the structure 

static struct spi_cs_control spi_cs_ctrl = {
.gpio_pin = 11,
.delay = 0,
.gpio_dt_flags = GPIO_ACTIVE_LOW
};

and configured SCK, MISO, MOSI & CS as follows

ret = gpio_pin_configure(spi_cs_ctrl.gpio_dev, mosi_pin, GPIO_DS_ALT_HIGH | GPIO_DS_ALT_LOW);
RET_IF_ERR(ret);
ret = gpio_pin_configure(spi_cs_ctrl.gpio_dev, miso_pin, GPIO_DS_ALT_HIGH | GPIO_DS_ALT_LOW);
RET_IF_ERR(ret);
ret = gpio_pin_configure(spi_cs_ctrl.gpio_dev, sck_pin, GPIO_DS_ALT_HIGH | GPIO_DS_ALT_LOW);
RET_IF_ERR(ret);
ret = gpio_pin_configure(spi_cs_ctrl.gpio_dev, cs_pin, GPIO_DS_ALT_HIGH | GPIO_DS_ALT_LOW);
RET_IF_ERR(ret);

Observed delay is for CS drive:

Before transmission = 5microseconds (CS drive high to low and after 5us SPI Tx)

After Transmission = 10microseconds (SPI tx is done, after 10us CS drive low to high)

I want to minimize this delay as much as possible. Please help me doing this.

[Håkon Alseth]

Hi,

 

The problem with using spi_cs_control is that it's software controlled, as the zephyr port does use the hardware controlled CSN pin (also: hw controlled CSN does not play nice together with multiple slaves):

https://github.com/nrfconnect/sdk-zephyr/blob/master/drivers/spi/spi_nrfx_spim.c#L437

 

You can use the nrfx_spim driver directly, or try to set the register manually in your application code (remember to disable the spi_cs_control struct if you do so):

https://infocenter.nordicsemi.com/topic/ps_nrf5340/spim.html?cp=3_0_0_6_29_6_26#register.PSEL.CSN

 

Kind regards,

Håkon

[SanketC]

Hello Håkon,

Would you help me provide any ready example for following things:

1. How can I control GPIO directly

2. How to use spi_nrfx_spim

This will really help us to save time. 

Best Regards,

SanketC

[Håkon Alseth]

Hi,

 

For an example of using the nrfx driver directly, please see this post:

https://devzone.nordicsemi.com/f/nordic-q-a/69279/spim-transfer-crashing-on-nrf5340/288955#288955

 

For using hardware controlled CSN, please see my former response, which is essentially taking your current firmware and:

1. remove the zephyr wrappers CSN control (see your variable "spi_cs_ctrl", remember to also remove it from the device tree)

2. configure your csn pin as output, then write NRF_SPIM4->PSEL.CSN=yourwantedpin; after initializing the spi instance to see if this works.

 

Kind regards,

Håkon

[SanketC]

Hello Håkon,

Thank you for giving me a pointer for SPI to look into. As currently, this delay is creating some trouble so I am looking for some other peripherals.  Next week I will look into SPI and get back to you in case of any queries. 

Best Regards,

Sanket C

[Håkon Alseth]

Hi,

 

SanketC said:

Thank you for giving me a pointer for SPI to look into. As currently, this delay is creating some trouble so I am looking for some other peripherals.  Next week I will look into SPI and get back to you in case of any queries. 

Happy to help! let me know if you run into any issues!

 

Kind regards,

Håkon