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nRF5340: Special considerations for ARM TrustZone for Cortex-M enabled system

Hello!

I'm reading the documentation that exists for the nRF5340 and struggle a bit about the Secure attribute unit (SAU)

If you read the ARM documentation about TrustZone with the arm cortex m-33 regarding secure and non-secure zones do they use the SAU to configure those zones.

In the nRF5340 documentation under chapter "Special considerations for ARM TrustZone for Cortex-M enabled system" does it say:

"Full support is provided for:
• ARM TrustZone for Cortex-M related instructions, like test target (TT) for reporting the security
attributes of a region
• Non-secure callable (NSC) regions, to implement secure entry points from non-secure code

The SPU provides the necessary registers to configure the security attributes for memory regions and
peripherals. However, as a requirement to use the SPU, the secure attribution unit (SAU) needs to be
disabled and all memory set as non-secure in the ARM core. This will allow the SPU to control the IDAU
and set the security attribution of all addresses as originally intended."

How do I disable the SAU?
Currently, am I doing it by disabling  the bits in the SAU control register. (Which I think is the correct way to do it)

How do I set all memory as non-secure in the ARM core?

I guess this is a relevant nRF question, as it says it is mandatory to do in order to use the SPU, but the documentation doesn't say how to do it.

Best regards
Buttman

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