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Internal pull-down of SWD line(s) in nRF51822 (code QFACA10)

Hi. We've got a chip with a code QFACA10. I am trying to find out if there is the internal pull-down of SWD line or not. It seemed that adding an external pull-down had positive effect and current consumption values are now much more predictable and under 1 mA. However, as far as I can read your tables, that revision should already have the internal pull-down.

Can somebody please confirm if the chip has that critical pull-down or not? Is there any other reason that might cause similar current consumption variations?

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