9160 anamoly SICA rev 1

Question about errata workarounds for 9160 rev 1 (BO) SICA.

I see these in the errata which are relevant for our project:

[15] REGULATORS: Supply regulators default to LDO mode after reset
https://infocenter.nordicsemi.com/index.jsp?topic=%2Ferrata_nRF9160_Rev1%2FERR%2FnRF9160%2FRev1%2Flatest%2Fanomaly_160_15.html&cp=2_0_1_1_1_6

[31] LFXO: LFXO startup fails
https://infocenter.nordicsemi.com/index.jsp?topic=%2Ferrata_nRF9160_Rev1%2FERR%2FnRF9160%2FRev1%2Flatest%2Fanomaly_160_31.html&cp=2_0_1_1_1_15



I check under fixed issues:

14 REGULATORS Supply regulators default to LDO mode after reset

So 14 ==> 15 seems fixed in the B0 rev 1 SICA revision if I read this correct.

The [31] anamoly is still an issue to be code corrected at boot up.

I did in main() put the code for it:

*((volatile uint32_t *)0x5000470Cul) = 0x0;
*((volatile uint32_t *)0x50004710ul) = 0x1;


What happens then, is when running these instructions, the chip resets and reboots.
So it becomes a reset cycle.


Advice?
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