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on chip power on reset rise time slew rate

To the kind attention of Nordic support team,

About nRF52833 product specifications (8. recommended operating conditions) 

"Note: The on-chip power-on reset circuitry may not function properly for rise times longer than the specified maximum."

I d wanted to know, if possible, what does it happen when such a thing occurs. And what happens "after" such a thing occurs, and other resets are done with a correct rise time.

Rise time slew rate is too slow, so chip doesn't reset correctly and at the end program execution doesn't start at all.

I'm very much interested indeed in understand what happens next.

After this abnormal condition occurs, is this chip status even theoretically able to affect next power-on resets that are done for a while (and with a correct rise time)?

Hope that the meaning of my question is clear.

Thank you for your kindness,

Best regards

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  • I d wanted to know, if possible, what does it happen when such a thing occurs.

    The chip is unresponsive, no code is running, but the current consumption can be high (~uA to few mA). The chip is in an undefined state since the various clocks, regulatores and peripherals have not received a reset signal internally.

    And what happens "after" such a thing occurs, and other resets are done with a correct rise time.

    Only a new power on reset (within specified rise time) will guarantee that the chip become functional again.

    Kenneth

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  • I d wanted to know, if possible, what does it happen when such a thing occurs.

    The chip is unresponsive, no code is running, but the current consumption can be high (~uA to few mA). The chip is in an undefined state since the various clocks, regulatores and peripherals have not received a reset signal internally.

    And what happens "after" such a thing occurs, and other resets are done with a correct rise time.

    Only a new power on reset (within specified rise time) will guarantee that the chip become functional again.

    Kenneth

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