SAADC VDDHDIV5 input on nRF52840 rev. 1

[Norbert]

Hello,

I got two PCA10056 1.0.0 DKs equipped with an nRF52840 rev. 1 (code AC0). Both do not measure the VCCH voltage correctly (displayed voltage ~2.4V instead of 3.0V). The setup is based on the peripheral->saadc example with the only modification being:

//      NRF_DRV_SAADC_DEFAULT_CHANNEL_CONFIG_SE(NRF_SAADC_INPUT_AIN0);
        NRF_DRV_SAADC_DEFAULT_CHANNEL_CONFIG_SE(NRF_SAADC_INPUT_VDDHDIV5);
        channel_config.gain = NRF_SAADC_GAIN1_2;

I chose to increase the input voltage swing on the ADC by configuring the gain stage from 1/6 to 1/2. This should normally give better results.

The displayed result is around 410: 410/1023 * 0.6V * 5 * 2 = 2.4V. I got the same result with the gain stage set to 1/6. The result is consistent across the two boards. Using NRF_SAADC_INPUT_VDD with gain 1/6 yields the correct result. A custom board with a rev. 2 chip works correctly with VDDHDIV5.

Can you confirm this behaviour? I did not see any erratum against explaining this. I can only guess that this behaviour (if confirmed) is a side-effect of erratum 197.

Thanks,

Norbert

[Norbert]

Hi Karl,

Karl Ylvisaker said:

Changing the gain to 1/2 will affect your input range - with this configuration you should really only be able to measure values between 0 - 1.2 V. 

VDDHDIV5 should provide 3.0V/5 = 0.6V at the input of the gain stage (ref. to PS1.5, fig. 148), so according to the PS this is fine.

Where do you see that the input range is limited to 2* 1.2V? The link you provided says the same thing as the PS, i.e. that AINx have to be between VSS and VDD (up to 3V, here). The input of the SAADC code after the gain stage should not be larger as VREF (0.6V), else the value is clipped.

Karl Ylvisaker said:

That sounds strange to me. Are you getting the same output regardless of gain stage?

The result is the measured voltage, not the raw integer value from the SAADC.So factoring in the changed gain stage, the result if the same.

Karl Ylvisaker said:

Could you share with me the code you are running when this happens?

As I said, it is the SDK 17.1.0 saadc example with the modifications in the original post (main.c, line 153). No other modifications.

Karl Ylvisaker said:

Could you try this again with the DCDC disabled, to see if it makes any difference to the values you are measuring?

To the best of my knowledge, the saadc example does not enable DCDC0. It does not make much sense on the DK as VDDH = VDD = 3.0V by the DK's HW architecture.

Karl Ylvisaker said:

Do you have any possibility of externally measuring or scoping the VDDH of the devices, such as through an oscilloscope?

Yes. VDDH is rock stable at 2.98V.

Best regards,

Norbert

[Karl Ylvisaker]

Hello again, Norbert

Thank you for your patience with this.

Norbert said:

VDDHDIV5 should provide 3.0V/5 = 0.6V at the input of the gain stage (ref. to PS1.5, fig. 148), so according to the PS this is fine.

Where do you see that the input range is limited to 2* 1.2V? The link you provided says the same thing as the PS, i.e. that AINx have to be between VSS and VDD (up to 3V, here). The input of the SAADC code after the gain stage should not be larger as VREF (0.6V), else the value is clipped.

Norbert said:

To the best of my knowledge, the saadc example does not enable DCDC0. It does not make much sense on the DK as VDDH = VDD = 3.0V by the DK's HW architecture.

Ah, yes of course, you are completely right. The DCDC is also indeed not enabled by default in the examples.
The input range will still be limited by the chosen gain and reference, but it does indeed not matter for this case since you are measuring on VDDHDIV5.

Norbert said:

Yes. VDDH is rock stable at 2.98V.

Thank you for confirming this. I assumed that you already knew, but from experience I still had to ask.

Norbert said:

The result is the measured voltage, not the raw integer value from the SAADC.So factoring in the changed gain stage, the result if the same.

Right, I was under the impression that you were talking about the raw integer value, which definitely would have been strange if it had been the case.

I do not immediately see any good explanation for this behavior.
I will try to replicate this behavior at my end tomorrow, I will update you as soon as I have got something.

Best regards,
Karl

[Karl Ylvisaker]

Hello Norbert,

Norbert said:

Sorry for closing the thread before.

No problem at all - the feature is intended to summarize tickets by highlighting the answer that solved the issue, but it also locks the thread to avoid that it later diverges from the original issue.

Norbert said:

Back to the topic: In my understanding, with SW9 in position "VDD", VDD_nRF is about equal to VDD_HV, so the measurement should work. I checked the VDD_HV level and it is ~3.0V, same as VDD_nRF (there is only an load switch between the two).

Am I wrong here?

Yes, from what I can tell VDDH is not really in use when the nRF is in Normal voltage mode, so I do not think it is a valid source to measure the nRF's supply voltage when not in high voltage mode. I will reach out to the developers of the nRF52840 DK to see if they have any additional comment on this.

Could you specify where you accessed VDD_HV on the board when you measured it?
Could you also try to switch the SW9 to Li-Po, provide 3 V to the J6 or P27 port, and then see what your results for the VDDHDIV5 measurements are?

However, if you are not using the nRF in high voltage mode you should just use the SAADC's _VDD input instead of the VDDH to measure the voltage of the supply.

Best regards,
Karl

[Norbert]

Hello Karl,

Karl Ylvisaker said:

reach out to the developers of the nRF52840 DK to see if they have any additional comment on this

Sounds good. I am interested to hear their comments, if any.

Karl Ylvisaker said:

Could you specify where you accessed VDD_HV on the board

C19 next to the chip.

Karl Ylvisaker said:

Could you also try to switch the SW9 to Li-Po, provide 3 V to the J6 or P27 port, and then see what your results for the VDDHDIV5 measurements are?

With 3.0V supplied to P27 and SW9 in LiPo position, I get a reading of 170 (=3.0V) too. So indeed VDDHDIV5 is invalid if not in HV power configuration. That is totally OK for me.

Karl Ylvisaker said:

However, if you are not using the nRF in high voltage mode you should just use the SAADC's _VDD input instead of the VDDH to measure the voltage of the supply.

Okay. My experiment was for the next board architecture. I was not aware of any dependency between SAADC input and power configuration (in hindsight it is obvious, though).

Thanks for your time,

Norbert

[Karl Ylvisaker]

Hello again Norbert,

Norbert said:

C19 next to the chip.

Thank you for confirming this.

Norbert said:

Sounds good. I am interested to hear their comments, if any.

The DK developers just got back to me, they too concluded that this must then be caused by something internal to the SoC when operating in normal voltage mode contra high voltage mode. They conclude that this must be the case since you are measuring 3 V on C19.

Norbert said:

Okay. My experiment was for the next board architecture. I was not aware of any dependency between SAADC input and power configuration (in hindsight it is obvious, though).

Norbert said:

With 3.0V supplied to P27 and SW9 in LiPo position, I get a reading of 170 (=3.0V) too. So indeed VDDHDIV5 is invalid if not in HV power configuration. That is totally OK for me.

Great, I am glad to hear that you too are seeing the expected measurements in the High voltage configuration, and that this is not an issue for your next project.

Norbert said:

Thanks for your time,

It is no problem at all, Norbert - I am happy to help!

Please do not hesitate to open another ticket if you should encounter any other issues or questions in the future.

Good luck with your development!

Best regards,
Karl

[pmochocki]

Karl Ylvisaker said:

Yes, from what I can tell VDDH is not really in use when the nRF is in Normal voltage mode, so I do not think it is a valid source to measure the nRF's supply voltage when not in high voltage mode.

This is very useful and has helped me a lot, as I was wondering why I get strange results when using VDDHDIV5 in Normal voltage mode. To bad that this information is not in the datasheet. I understand that VDDH is not really in use when the nRF is in Normal voltage mode, but VDDH is connected to VDD so users might expect this to work.   

[Karl Ylvisaker]

Hello,

I am glad to hear that you found the answers here useful! :) 

It is indeed not explicitly mentioned in the datasheet - I will write a note about this to our techwriters and see if it is something they can amend if there is a future release of the Product Specification planned.

Thank you for the feedback, we appreciate it! :) 

Best regards,
Karl