Memory model of the nRF5340: fully compliant with Armv8-m?

Hello,

We're implementing an application that makes use of C++ std::atomic variables and their associated memory-ordering semantics for inter-processor communication between the application and network cores of the nRF5340.

The Armv8-M Architecture Reference Manual describes the Armv8-M's memory model in chapter B7 and is what we'll be using for reference.

Is the nRF5340 fully compliant to all rules described in chapter B7 of the manual?

Are there any known issues with using C++ atomics (std::atomic) on the nRF5340?

Thanks,

  Colin

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