Managing Two SPI Masters and One SPI Flash Slave

[aurora]

I currently use an NRF52810 to write a firmware in an external flash, then an STM32 will read this firmware and download it in its internal flash. The communication between the NRF flash and the flash STM is done by SPI. The problem I am facing is that when both devices (NRF and STM) are connected to the flash, the NRF can' t  write  properly to the flash even if the pins of the STM32 are in a high impedance state (the flash wires are tied to the pins in a high impedance state). Moreover, the stm32 only starts reading the firmware when the NRF has completed its writing, the two masters (nrf and STM) do not access the flash at the same time.

[Kenneth]

Hello,

I would have checked both the SPI pins (CLK, MISO and MOSI) and the Chip Select pin (CSN). Can it be that the STM32 is driving the CSN pin high, while the nRF52 is trying to drive CSN low? Maybe you can consider having a 10kohm pull-up on the CSN pin, and it's only driven low by the STM32 and nRF52 when in use?

Do you have a logic analyzer trace of the SPI and CSN pins when driven by the nRF52?

Kenneth